Abstract:
A display panel test apparatus includes: an image pickup part which picks up an image from a target display panel; a jig including a receiving part which receives the target display panel, a fixing part which fixes the image pickup part, and an adjusting part which adjusts an image pickup angle of the image pickup part; a pattern generating part which provides the target display panel with a test pattern; a defect extracting part which analyzes test image data provided from the image pickup part using a defect extracting algorithm and extracts display defect information, where the defect extracting algorithm includes different settings corresponding to different types of display defects; and a control part which generates evaluated data corresponding to a viewing angle of the target display panel using the image pickup angle of the image pickup part and the display defect information.
Abstract:
A display panel test apparatus includes: an image pickup part which picks up an image from a target display panel; a jig including a receiving part which receives the target display panel, a fixing part which fixes the image pickup part, and an adjusting part which adjusts an image pickup angle of the image pickup part; a pattern generating part which provides the target display panel with a test pattern; a defect extracting part which analyzes test image data provided from the image pickup part using a defect extracting algorithm and extracts display defect information, where the defect extracting algorithm includes different settings corresponding to different types of display defects; and a control part which generates evaluated data corresponding to a viewing angle of the target display panel using the image pickup angle of the image pickup part and the display defect information.
Abstract:
A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.
Abstract:
A driver of a display device is provided. The driver for a display device includes a signal controller receiving first and second input image data, converting the first input image data into first output image data having a grayscale higher than that of the first input image data and converting the second input image data into second output image data having a grayscale lower than that of the second input image data; and a data driver converting the first and second output image data received from the signal controller into first and second data voltages and applying the first and second data voltages to corresponding pixels, respectively.
Abstract:
A display device includes a display panel and a voltage generating part. The display panel includes a switching element, a main pixel section, a coupling capacitor and a sub pixel section. The main pixel section is electrically connected to the switching element. The coupling capacitor has a first end electrically connected to the switching element. The sub pixel section is electrically connected to a second end of the coupling capacitor. The voltage generating part controls data voltages corresponding to a gray-scale in a range from a low gray-scale to a high gray-scale that corresponds to a saturation voltage of the sub pixel section for displaying an image. The data voltages are applied to the display panel. Therefore, the viewing angle and the luminance are improved.
Abstract:
An LCD device includes a lower panel having a first substrate; an organic layer formed on the first substrate; a trans-reflection layer formed on the organic layer and having a reflection area reflecting a portion of incidence light from exterior and a transmission area transmitting other portion of the incidence light; color filters formed on the trans-reflection layer; an overcoating layer formed on the color filters; and a common electrode formed on the overcoating layer. A portion of the overcoating layer corresponding to the reflection area is thicker than a portion of the overcoating layer corresponding to the transmission area. The LCD device also includes an upper panel including a second substrate facing the first substrate with a predetermined gap; thin film transistors formed on the second substrate; and pixel electrodes connected to the thin film transistors; and a liquid crystal layer disposed between the lower and upper panels.
Abstract:
Disclosed are a liquid crystal display device and a method for manufacturing the same, in which wirings connected between pads and an integrated circuit is protected from being corroded. A pixel array is formed on a display region of a substrate. A plurality of pads are formed on a non-display region of the substrate. An integrated circuit is formed on the non-display region of the substrate and connected to the pads to generate a signal for operating the pixel array. Conductive barrier layers separated from each of the pads are formed on peripheral portions of the pads connected to the integrated circuit. The conductive barrier layers have electric potential equivalent to that of each of the pads in accordance with internal connections of the integrated circuit. When bumps of the integrated circuit and the pads are attached to each other, the conductive barrier layers prevent the pads and the wirings connected to the pads from being corroded.
Abstract:
An alignment layer, a method for forming the alignment layer, and a liquid crystal display (LCD) adopting the alignment layer are provided. The alignment layer includes a heat-curable resin layer having microgrooves and an optical alignment polymer layer, coated on the heat-curable resin layer. According to the present invention, the thermal stability of the alignment layer is improved. Accordingly, an LCD adopting the alignment layer has improved display performance.
Abstract:
A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.
Abstract:
A semiconductor device test system is disclosed. The semiconductor device test system extends driver- and comparator-functions acting as important functions of a test header to an external part (e.g., a HIFIX board) of the test header, such that it can double the productivity of a test without upgrading the test header. The semiconductor device test system includes a test header for testing a semiconductor device by a test controller, and a HIFIX board for establishing an electrical connection between the semiconductor device and the test header, and including a Device Under Test (DUT) test unit which processes a read signal generated from the semiconductor device by making one pair with a driver of the test header and transmits the processed read signal to the test header.