Two-stage voltage converters for microprocessors

    公开(公告)号:US11929673B2

    公开(公告)日:2024-03-12

    申请号:US17452816

    申请日:2021-10-29

    Applicant: Ferric Inc.

    CPC classification number: H02M3/07 G06F1/26

    Abstract: An assembly includes a three-level voltage converter and a second voltage converter. The three-level voltage converter is electrically coupled to a battery to convert a battery supply voltage to an intermediate voltage. The second voltage converter is electrically coupled to the three-level voltage converter to convert the intermediate voltage to a processor-supply voltage to operate a processor. At least the second voltage converter and the processor are mounted on a processor-package substrate. The three-level voltage converter can be mounted on the processor-package substrate or on a circuit board on which the processor-package substrate is mounted.

    Integrated circuit with laminated magnetic core inductor and magnetic flux closure layer

    公开(公告)号:US11058001B2

    公开(公告)日:2021-07-06

    申请号:US16007631

    申请日:2018-06-13

    Applicant: Ferric Inc.

    Abstract: A structure comprises a semiconductor integrated circuit, an inductor, and a magnetic flux closure layer. The inductor is integrated into a multilevel wiring network in the semiconductor integrated circuit. The inductor includes a planar laminated magnetic core and a conductive winding that turns around in a generally spiral manner on the outside of the planar laminated magnetic core. The planar laminated magnetic core includes an alternating sequence of a magnetic layer and a non-magnetic layer. The magnetic flux closure layer is disposed within about 100 μm of a face of the planar laminated magnetic core, the face of the planar magnetic core parallel to a principal plane of the planar laminated magnetic core. A second magnetic flux closure layer can be disposed within about 100 μm of an opposing face of the planar laminated magnetic core.

    Compact Transceiver on a Multi-Level Integrated Circuit

    公开(公告)号:US20200168394A1

    公开(公告)日:2020-05-28

    申请号:US16778154

    申请日:2020-01-31

    Applicant: Ferric Inc.

    Abstract: Power and/or data are transmitted through variable magnetic fields between a first transceiver coil on a transceiver apparatus and a second transceiver coil in an inductor integrated into a multilevel wiring structure on a semiconductor integrated circuit chip. The first transceiver apparatus generates magnetic fields and can transmit data by varying a characteristic of the magnetic fields. The second transceiver coil receives the power from and/or detects data in the magnetic fields from the first transceiver apparatus. The inductor can include a ferromagnetic core that concentrates magnetic flux to improve data or power transmission efficiency to miniaturize the second transceiver coil while maintaining adequate inductive coupling between the coils. The second transceiver coil can transmit data by varying the impedance of the inductor and/or the integrated circuit. The semiconductor integrated circuit chip can be coupled to an object and the second transceiver coil can transmit data relating to the object.

    Processor module with integrated packaged power converter

    公开(公告)号:US10658331B2

    公开(公告)日:2020-05-19

    申请号:US16129305

    申请日:2018-09-12

    Applicant: Ferric Inc.

    Abstract: A power management module comprises one or more power converter chips that are mounted on a power management package substrate. First and second electrical contacts are disposed on opposing first and second sides of the power management package substrate. The power management module can be mounted on a processor module to supply power to one or more processor chips in the processor module. In one example, the processor chip(s) are mounted on a first side of a processor package substrate and the power management module is mounted on an opposing second side of the processor package substrate. The power management module and the processor module can be centered and aligned with respect to each other or they can be offset laterally from each other. In another embodiment, the processor chip(s) are embedded in the processor package substrate.

    Electromagnetically-Driven Ferromagnetic Actuator Device

    公开(公告)号:US20200152364A1

    公开(公告)日:2020-05-14

    申请号:US16184024

    申请日:2018-11-08

    Applicant: Ferric Inc.

    Abstract: A ferromagnetic actuator is disposed between first and second semiconductor devices that include first and second inductors. Each inductor is disposed on top of a multilevel wiring structure. Current flows through the first inductor to generate a first magnetic field that attracts the ferromagnetic actuator towards the first inductor causing the ferromagnetic actuator to transition from a first state to a second state. In the second state, a portion of the ferromagnetic actuator is disposed closer to the first inductor than it is in the first state. Current flows through the second inductor to generate a second magnetic field that attracts the ferromagnetic actuator towards the second inductor causing the ferromagnetic actuator to transition from the first or second state to a third state. In the third state, a portion of the ferromagnetic actuator is disposed closer to the first inductor than it is in the first state.

    Method of manufacturing a processor

    公开(公告)号:US10028385B2

    公开(公告)日:2018-07-17

    申请号:US14991111

    申请日:2016-01-08

    Applicant: Ferric Inc.

    Abstract: An inductor is integrated into a multilevel wiring network of a semiconductor integrated circuit. The inductor includes a planar magnetic core and a conductive winding. The conductive winding turns around in generally spiral manner on the outside of the planar magnetic core. The conductive winding is piecewise constructed of wire segments and of VIAs. The wire segments pertain to at least two wiring planes and the VIAs are interconnecting the at least two wiring planes. Methods for such integration, and for fabricating laminated planar magnetic cores are also presented.

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