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    Method for operating a semiconductor memory device and semiconductor memory device
    3.
    发明申请
    Method for operating a semiconductor memory device and semiconductor memory device 审中-公开
    用于操作半导体存储器件和半导体存储器件的方法

    公开(公告)号：US20070103980A1

    公开(公告)日：2007-05-10

    申请号：US11272044

    申请日：2005-11-10

    申请人： Gert Koebernick ,  Uwe Augustin

    发明人： Gert Koebernick ,  Uwe Augustin

    IPC分类号： G11C16/06

    CPC分类号： G11C16/344 ,  G11C16/3477

    摘要： A method for restoring information stored in a memory cell that has a variable characteristic indicating the stored information, wherein a first state is stored if the characteristic is below a reading threshold or a second state is stored if the characteristic is above the reading threshold. The method includes verifying whether the absolute value of a first difference between the characteristic and the reading threshold is larger than a given first threshold. If the absolute value of the first difference is larger than the given first threshold, the method further includes changing the characteristic so that the absolute value of the first threshold is reduced or that the stored state is altered.

    摘要翻译： 一种用于恢复存储在具有指示存储信息的可变特性的存储单元中的信息的方法，其中如果特征低于读取阈值则存储第一状态，或者如果特征高于读取阈值则存储第二状态。 该方法包括验证特征和读取阈值之间的第一差异的绝对值是否大于给定的第一阈值。 如果第一差异的绝对值大于给定的第一阈值，则该方法还包括改变特性，使得第一阈值的绝对值减小或存储状态被改变。

    Integrated circuits, memory controller, and memory modules
    4.
    发明授权
    Integrated circuits, memory controller, and memory modules 失效
    集成电路，存储器控制器和存储器模块

    公开(公告)号：US07636258B2

    公开(公告)日：2009-12-22

    申请号：US11955278

    申请日：2007-12-12

    申请人： Andreas Kux ,  Detlev Richter ,  Gert Koebernick ,  Juergen Engelhardt ,  Sudhindra Prasad

    发明人： Andreas Kux ,  Detlev Richter ,  Gert Koebernick ,  Juergen Engelhardt ,  Sudhindra Prasad

    IPC分类号： G11C16/00

    CPC分类号： G11C16/349 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3495

    摘要： In accordance with embodiments of the invention, there are provided integrated circuits, memory controller, a method for determining a level for programming or erasing a memory segment, and a method for determining a wear level score for a memory segment. In an embodiment of the invention, a method for determining a level for programming or erasing a memory segment is provided, wherein a first level for programming or erasing a memory segment is determined as a function of an initial program/erase level. Furthermore, a first updated level is determined for a subsequent program/erase operation of the memory segment and a second level for programming or erasing the memory segment subsequent to programming or erasing the memory segment is determined using the first level, wherein the second level is determined as a function of the first updated level.

    摘要翻译： 根据本发明的实施例，提供了集成电路，存储器控制器，用于确定用于编程或擦除存储器段的电平的方法，以及用于确定存储器段的磨损等级得分的方法。 在本发明的实施例中，提供了一种用于确定用于编程或擦除存储器段的电平的方法，其中用于编程或擦除存储器段的第一电平被确定为初始编程/擦除电平的函数。 此外，对于存储器段的随后的编程/擦除操作确定第一更新级别，并且使用第一级确定用于在编程或擦除存储器段之后编程或擦除存储器段的第二级，其中第二级是 确定为第一更新水平的函数。

    Memory device and method for operating a memory device
    5.
    发明授权
    Memory device and method for operating a memory device 有权
    用于操作存储器件的存储器件和方法

    公开(公告)号：US07342829B2

    公开(公告)日：2008-03-11

    申请号：US11241817

    申请日：2005-09-30

    申请人： Gert Koebernick ,  Konrad Seidel ,  Uwe Augustin

    发明人： Gert Koebernick ,  Konrad Seidel ,  Uwe Augustin

    IPC分类号： G11C11/34

    CPC分类号： G11C16/0475 ,  G11C16/04 ,  G11C16/0491 ,  G11C16/10 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028

    摘要： A memory device (1) includes a memory array (2). The memory array (2) has at least one memory area (5) that includes a plurality of conductive lines (3) and a plurality of memory cells (4) connected to the conductive lines (3). The conductive lines (3) are arranged at positions (n) within the memory area (5). The memory cells (4) are erasable and are programmable by application of an electrical programming pulse (P) supplied via a respective conductive line (3). The memory device (1) is constructed such that for programming of a memory cell (4) an electrical programming pulse (P) is applied which has a programming pulse profile (PP) depending on the position (n) of a respective conductive line (3) to which the memory cell (4) is connected.

    摘要翻译： 存储器件（1）包括存储器阵列（2）。 存储器阵列（2）具有包括连接到导线（3）的多个导线（3）和多个存储单元（4）的至少一个存储区域（5）。 导线（3）布置在存储区域（5）内的位置（n）处。 存储单元（4）是可擦除的并且可通过施加经由相应的导线（3）提供的电编​​程脉冲（P）来编程。 存储器件（1）被构造成使得对于存储器单元（4）的编程，施加电编程脉冲（P），该编程脉冲（P）根据相应导线的位置（n）具有编程脉冲轮廓（PP） 3）连接存储单元（4）。

    Memory device and method for operating a memory device
    6.
    发明申请
    Memory device and method for operating a memory device 有权
    用于操作存储器件的存储器件和方法

    公开(公告)号：US20070076464A1

    公开(公告)日：2007-04-05

    申请号：US11241817

    申请日：2005-09-30

    申请人： Gert Koebernick ,  Konrad Seidel ,  Uwe Augustin

    发明人： Gert Koebernick ,  Konrad Seidel ,  Uwe Augustin

    IPC分类号： G11C17/00

    CPC分类号： G11C16/0475 ,  G11C16/04 ,  G11C16/0491 ,  G11C16/10 ,  G11C29/02 ,  G11C29/021 ,  G11C29/028

    摘要： A memory device (1) includes a memory array (2). The memory array (2) has at least one memory area (5) that includes a plurality of conductive lines (3) and a plurality of memory cells (4) connected to the conductive lines (3). The conductive lines (3) are arranged at positions (n) within the memory area (5). The memory cells (4) are erasable and are programmable by application of an electrical programming pulse (P) supplied via a respective conductive line (3). The memory device (1) is constructed such that for programming of a memory cell (4) an electrical programming pulse (P) is applied which has a programming pulse profile (PP) depending on the position (n) of a respective conductive line (3) to which the memory cell (4) is connected.

    摘要翻译： 存储器件（1）包括存储器阵列（2）。 存储器阵列（2）具有包括连接到导线（3）的多个导线（3）和多个存储单元（4）的至少一个存储区域（5）。 导线（3）布置在存储区域（5）内的位置（n）处。 存储单元（4）是可擦除的并且可通过施加经由相应的导线（3）提供的电编​​程脉冲（P）来编程。 存储器件（1）被构造成使得对于存储器单元（4）的编程，施加电编程脉冲（P），该编程脉冲（P）根据相应导线的位置（n）具有编程脉冲轮廓（PP） 3）连接存储单元（4）。