公开(公告)号：US06973653B1

公开(公告)日：2005-12-06

申请号：US09521308

申请日：2000-03-09

申请人： Bruce A. Fairman ,  Scott D. Smyers ,  Harold A. Ludtke ,  Glen D. Stone

发明人： Bruce A. Fairman ,  Scott D. Smyers ,  Harold A. Ludtke ,  Glen D. Stone

IPC分类号： H04J3/24 ,  G06F7/00 ,  G06F9/46 ,  G06F9/50 ,  H01L20060101 ,  H04Q11/00

CPC分类号： G06F9/485 ,  G06F9/4881 ,  G06F2209/485

摘要： A method for providing optimal performance in an electronic device comprises at least one resource characterization that includes resource requirements for executing a requested process. An allocation manager may then compare the resource requirements for the requested process to the currently-available device resources. The allocation manager may then authorize or deny the requested process depending upon whether the currently-available resources are sufficient to adequately service the resource requirements of the requested process.

摘要翻译： 用于在电子设备中提供最佳性能的方法包括至少一种资源表征，其包括用于执行所请求的过程的资源需求。 然后，分配管理器可以将所请求进程的资源需求与当前可用的设备资源进行比较。 然后，分配管理器可以根据当前可用的资源是否足以充分地满足所请求进程的资源需求来授权或拒绝所请求的进程。

公开(公告)号：US06952826B1

公开(公告)日：2005-10-04

申请号：US09691879

申请日：2000-10-18

申请人： Scott D. Smyers ,  Bruce A. Fairman ,  Glen D. Stone ,  Harold A. Ludtke

发明人： Scott D. Smyers ,  Bruce A. Fairman ,  Glen D. Stone ,  Harold A. Ludtke

IPC分类号： G06F9/46 ,  G06F9/48

CPC分类号： G06F9/4881

摘要： A method for implementing a multi-level system model for deterministically handling selected data comprises a picokernel module that invokes an isochronous scheduler to select, schedule, and execute active isochronous processes on an electronic device in response to a cycle start signal from an isochronous clock. The active isochronous processes may selectively set plesiochronous flags to thereby designate corresponding plesiochronous processes as active plesiochronous processes. Once all active isochronous processes have been executed in a given isochronous cycle, then the picokernel may invoke a plesiochronous scheduler to select, schedule, and execute any active plesiochronous processes on the electronic device.

摘要翻译： 用于实现用于确定性地处理所选数据的多级系统模型的方法包括响应于来自同步时钟的周期开始信号，调用同步调度器以在电子设备上选择，调度和执行主动同步过程的picokernel模块。 活动同步过程可以选择性地设置plesiochron标志，从而将相应的plesiochron过程指定为活动的准同步过程。 一旦在给定的等时循环中已经执行所有活动的同步过程，则picokernel可以调用一个同步调度器来选择，调度和执行电子设备上的任何活动的同步过程。

公开(公告)号：US06928646B1

公开(公告)日：2005-08-09

申请号：US09496323

申请日：2000-02-02

申请人： David V. James ,  Glen D. Stone

发明人： David V. James ,  Glen D. Stone

IPC分类号： G06F9/46 ,  G06F9/48 ,  G06F9/50

CPC分类号： G06F9/4881

摘要： A system and method for efficiently performing scheduling operations in an electronic device comprises an allocation manager that initially evaluates a task scheduling request based upon certain request parameters. The request parameters may include a resource requirement and an execution interval. If the task scheduling request is granted, then the allocation manager adds the corresponding task to a prioritized task table. A scheduling manager may then reference the task table to efficiently identify the next task for scheduling and execution on the electronic device.

摘要翻译： 一种用于在电子设备中有效执行调度操作的系统和方法包括：分配管理器，其基于特定的请求参数最初评估任务调度请求。 请求参数可以包括资源需求和执行间隔。 如果授权任务调度请求，则分配管理器将相应的任务添加到优先级排序的任务表中。 然后，调度管理器可以引用该任务表来有效地识别用于在电子设备上进行调度和执行的下一个任务。

公开(公告)号：US06728834B2

公开(公告)日：2004-04-27

申请号：US10352260

申请日：2003-01-27

申请人： Glen D. Stone ,  Scott D. Smyers ,  Bruce A. Fairman

发明人： Glen D. Stone ,  Scott D. Smyers ,  Bruce A. Fairman

IPC分类号： G06F1200

CPC分类号： G06F12/0842 ,  G06F12/121

摘要： A system and method for effectively implementing isochronous processor cache comprises a memory device for storing high-priority isochronous information, an isochronous cache coupled to the memory device for locally caching the isochronous information from the memory device, and a processor device for accessing and utilizing the isochronous information that is stored in the isochronous cache. The isochronous cache is reserved for storing the isochronous information, and may be reconfigured into a selectable number of cache channels of varying size that each corresponds to an associated isochronous process.

摘要翻译： 用于有效实现等时处理器高速缓存的系统和方法包括用于存储高优先级等时信息的存储器设备，耦合到存储器设备的用于本地缓存来自存储器设备的等时信息的同步高速缓存器，以及用于访问和利用 存储在同步缓存中的同步信息。 保留同步缓存用于存储等时信息，并且可以将其重配置为可选数量的不同大小的高速缓存信道，每个高速缓存信道对应于相关联的等时进程。

公开(公告)号：US06557067B1

公开(公告)日：2003-04-29

申请号：US09497322

申请日：2000-02-03

申请人： David V. James ,  Scott D. Smyers ,  Glen D. Stone ,  Bruce A. Fairman

发明人： David V. James ,  Scott D. Smyers ,  Glen D. Stone ,  Bruce A. Fairman

IPC分类号： G06F1336

CPC分类号： H04L12/56

摘要： A system and method to effectively compensate for delays in an electronic interconnect comprises a controller that initially schedules a first transmission from a first talker device to several listener devices. The controller then schedules a second talker device to pre-roll a second transmission and selectively routes the second transmission to compensate for delays introduced by components of said electronic interconnect to thereby provide a seamless transmission stream to the several listeners.

摘要翻译： 有效地补偿电子互连中的延迟的系统和方法包括控制器，其最初调度从第一讲话器设备到多个收听器设备的第一传输。 然后，控制器调度第二讲话器设备来预先滚动第二传输，并且选择性地路由第二传输以补偿由所述电子互连的组件引入的延迟，从而向多个收听者提供无缝传输流。

公开(公告)号：US06463489B1

公开(公告)日：2002-10-08

申请号：US09383490

申请日：1999-08-26

申请人： Glen D. Stone ,  Bruce A. Fairman ,  Scott D. Smyers

发明人： Glen D. Stone ,  Bruce A. Fairman ,  Scott D. Smyers

IPC分类号： G06F1300

CPC分类号： H04L12/40058 ,  G06F13/364

摘要： A system and method for effectively performing isochronous data transfers comprises a network device including an input/output (I/O) bus that is coupled to an input/output (I/O) node and an isochronous-capable network interface. The network interface and the I/O node may send requests to an arbiter for control of the I/O bus to perform a data transfer operation. In accordance with the present invention, an arbiter filter is interposed between the arbiter and both the network interface and the I/O node to filter respective requests for control of the I/O bus. The network interface advantageously provides an isochronous request to the arbiter filter to thereby de-assert conflicting requests so that the network interface may effectively perform a time-sensitive isochronous data transfer.

摘要翻译： 用于有效执行等时数据传输的系统和方法包括网络设备，其包括耦合到输入/输出（I / O）节点和等时同步网络接口的输入/输出（I / O）总线。 网络接口和I / O节点可以向仲裁器发送请求以控制I / O总线以执行数据传输操作。 根据本发明，在仲裁器和网络接口和I / O节点之间插入一个仲裁器滤波器，以过滤各个I / O总线控制请求。 网络接口有利地向仲裁器过滤器提供同步请求，从而解除冲突请求，使得网络接口可以有效地执行时间敏感的等时数据传输。

公开(公告)号：US06208645B1

公开(公告)日：2001-03-27

申请号：US09084883

申请日：1998-05-28

申请人： David V. James ,  Glen D. Stone

发明人： David V. James ,  Glen D. Stone

IPC分类号： H04J314

CPC分类号： H04L1/0061 ,  H04L1/0041

摘要： A method and system for providing cyclic redundancy check (CRC) functions within a ringlet-type interconnect of a computer system are described. By time multiplexing CRC checking and generating functions, the number of CRC units can be reduced.

摘要翻译： 描述了一种用于在计算机系统的小环型互连中提供循环冗余校验（CRC）功能的方法和系统。 通过时间复用CRC校验和产生功能，可以减少CRC单元的数量。

公开(公告)号：US6006289A

公开(公告)日：1999-12-21

申请号：US748147

申请日：1996-11-12

申请人： David V. James ,  Glen D. Stone

发明人： David V. James ,  Glen D. Stone

IPC分类号： G06F13/14

CPC分类号： G06F13/28 ,  G06F13/4059

摘要： A system and method for coordinating the transmission and receipt of large data blocks as a series of smaller burst transfers through an intermediate interconnect coupling a pair of devices. A device receiving a transaction request ("initiator") specifies the data block size of the requested transaction to the other device ("target"). The target response will indicate that it is committed to the transaction, that it does not support requested transactions of the specified data block size, or that it currently lacks the buffer capacity to commit to the requested transaction. In the first instance, the initiator and target exchange the data block through the interconnect as a series of burst transfers until all data has been transferred, at which time the initiator (for read transactions) or the target (for write transactions) forwards the transferred data as a data block of the specified size. When the response indicates the target supports only smaller data block sizes, the initiator may adjust the specified data block size accordingly and proceed with the transaction once the target is committed. When the target response indicates insufficient buffers are currently available to accommodate data of a supported block size, the transaction may proceed as a series of independent burst transfers until all data is transferred or buffers sufficient for the specified block size become available.

摘要翻译： 一种用于通过耦合一对设备的中间互连来协调大数据块的传输和接收作为一系列更小的突发传输的系统和方法。 接收交易请求的设备（“发起者”）将请求的交易的数据块大小指定给其他设备（“目标”）。 目标响应将指示它被提交到事务，它不支持指定数据块大小的请求事务，或者它当前缺少提交到请求的事务的缓冲区容量。 在第一种情况下，发起者和目标者通过互连将数据块作为一系列突发传输进行交换，直到所有数据都被传输，此时启动器（用于读取事务）或目标（用于写入事务）将转发的 数据作为指定大小的数据块。 当响应指示目标仅支持更小的数据块大小时，发起方可以相应地调整指定的数据块大小，并在目标提交后继续进行事务。 当目标响应指示不足的缓冲器当前可用于容纳所支持的块大小的数据时，事务可以作为一系列独立的突发传送进行，直到所有数据被传送或足以使指定块大小变得可用的缓冲区为止。

公开(公告)号：US5845145A

公开(公告)日：1998-12-01

申请号：US576295

申请日：1995-12-21

申请人： David V. James ,  Donald N. North ,  Glen D. Stone

发明人： David V. James ,  Donald N. North ,  Glen D. Stone

IPC分类号： G06F13/40 ,  G06F3/00

CPC分类号： G06F13/4013

摘要： A system for efficiently supporting critical-word-first data transfers comprises a data storage device, a controller, a data selector, and a multiplexer. The data storage device is preferably capable of outputting data in one or more word orderings. The controller is preferably a state machine that processes data transfer requests by determining the orderings of data that the associated data storage device, data selector and multiplexer can provide, determining the ordering for the data requested and creating a response packet with the data ordered in critical-word-aligned order beginning with the word containing the requested address. The present invention also includes a method for efficiently supporting critical-word-first data transfers. The method includes the steps of: monitoring the bus for a data request packet; determining the desired order for the requested data; determining the transmission orders in which the data storage device can provide the data; determining the transmission order best matching the requested order and creating a response packet with the data ordered in the order best matching the desired requested order; adding response format information to the header of the response packet and transmitting the response packet on the bus.

摘要翻译： 用于有效支持关键字首先数据传输的系统包括数据存储设备，控制器，数据选择器和多路复用器。 数据存储装置优选地能够以一个或多个字排序输出数据。 控制器优选地是通过确定相关联的数据存储设备，数据选择器和多路复用器可以提供的数据的顺序来处理数据传送请求的状态机，确定所请求的数据的顺序并且创建响应包，其中数据被排列在关键 以包含请求的地址的单词开头的字对齐顺序。 本发明还包括一种有效支持关键字首先数据传输的方法。 该方法包括以下步骤：监视数据请求包的总线; 确定所请求数据的期望顺序; 确定数据存储设备可以提供数据的传输顺序; 确定与所请求的订单最佳匹配的传输顺序，并创建具有以与期望的请求顺序最佳匹配的顺序排列的数据的响应包; 将响应格式信息添加到响应分组的报头，并在总线上发送响应分组。

公开(公告)号：US06934781B2

公开(公告)日：2005-08-23

申请号：US10226025

申请日：2002-08-22

申请人： Glen D. Stone ,  Bruce A. Fairman ,  Scott D. Smyers

发明人： Glen D. Stone ,  Bruce A. Fairman ,  Scott D. Smyers

IPC分类号： G06F13/362 ,  G06F13/364 ,  H04L12/40 ,  H04L12/403 ,  H04L12/64

CPC分类号： H04L12/40058 ,  G06F13/364

摘要： A system and method for effectively performing isochronous data transfers comprises a network device including an input/output (I/O) bus that is coupled to an input/output (I/O) node and an isochronous-capable network interface. The network interface and the I/O node may send requests to an arbiter for control of the I/O bus to perform a data transfer operation. In accordance with the present invention, an arbiter filter is interposed between the arbiter and both the network interface and the I/O node to filter respective requests for control of the I/O bus. The network interface advantageously provides an isochronous request to the arbiter filter to thereby de-assert conflicting requests so that the network interface may effectively perform a time-sensitive isochronous data transfer.

摘要翻译： 用于有效执行等时数据传输的系统和方法包括网络设备，其包括耦合到输入/输出（I / O）节点和等时同步网络接口的输入/输出（I / O）总线。 网络接口和I / O节点可以向仲裁器发送请求以控制I / O总线以执行数据传输操作。 根据本发明，在仲裁器和网络接口和I / O节点之间插入一个仲裁器滤波器，以过滤各个I / O总线控制请求。 网络接口有利地向仲裁器过滤器提供同步请求，从而解除冲突请求，使得网络接口可以有效地执行时间敏感的等时数据传输。