公开(公告)号：US12108522B2

公开(公告)日：2024-10-01

申请号：US17250765

申请日：2019-08-28

申请人： SONY SEMICONDUCTOR SOLUTIONS CORPORATION

发明人： Takashi Miyamoto ,  Makoto Hayafuchi

IPC分类号： H05K1/02 ,  H01L23/552 ,  H01L27/146

CPC分类号： H05K1/0219 ,  H01L23/552 ,  H01L27/14636 ,  H01L27/14643 ,  H05K1/0216 ,  H05K1/0224

摘要： The present technology relates to a circuit board, a semiconductor device, and an electronic device for enabling effective suppression of generation of noise in a signal. The circuit board includes a reticulated conductor including a first conductor group configured by two or more conductors having a first conductor width and arranged with a first periodic width in a first direction, a second conductor group configured by two or more conductors having a second conductor width and arranged with a second periodic width in a second direction orthogonal to the first direction, and a first moving conductor group arranged at a position to which at least a part of the second conductor group is moved by a factor of 1 of the first periodic width in the first direction and is moved by a factor of 1 of a third periodic width in the second direction, the third periodic width and the second periodic width being different. The present technology can be applied to, for example, a circuit board of a semiconductor device.

公开(公告)号：US12028965B2

公开(公告)日：2024-07-02

申请号：US17629370

申请日：2021-03-10

申请人： Chengdu BOE Optoelectronics Technology Co., Ltd. ,  BOE Technology Group Co., Ltd.

发明人： Qing Gong

IPC分类号： H05K1/02 ,  H05K1/09 ,  H05K3/46

CPC分类号： H05K1/0224 ,  H05K1/092 ,  H05K3/4644

摘要： A circuit board, including: a substrate; a first line layer, a first protective layer, a first conductive ink layer and a first conductive layer successively formed on the substrate; and a second line layer, a second protective layer, a second conductive ink layer and a second conductive layer successively formed on a second face opposite a first face. The first protective layer includes at least one first opening for exposing a first grounding line of the first line layer; and the orthographic projection of the first conductive ink layer on the substrate covers the orthographic projection of the first opening on the substrate. The second protective layer includes at least one second opening for exposing a second grounding line of the second line layer; and the orthographic projection of the second conductive ink layer on the substrate covers the orthographic projection of the second opening on the substrate.

公开(公告)号：US11889625B2

公开(公告)日：2024-01-30

申请号：US17644446

申请日：2021-12-15

申请人： Murata Manufacturing Co., Ltd.

发明人： Akio Katsube

IPC分类号： H05K1/14 ,  H01L23/12 ,  H05K1/02

CPC分类号： H05K1/141 ,  H01L23/12 ,  H05K1/0224

摘要： A module includes: a wiring board as a ceramic board having a first main surface; a first component and a second component that are mounted on the first main surface; at least one conductive member disposed on the first main surface between the first component and the second component; a sealing resin that seals the first component, the second component, and the conductive member; and a shield film that covers an upper surface and a side surface of the sealing resin and a side surface of the wiring board. The shield film is electrically connected to a ground conductor. The conductive member is formed by firing simultaneously with the wiring board, and electrically connected to the ground conductor and electrically connected to the shield film.

公开(公告)号：US11877388B2

公开(公告)日：2024-01-16

申请号：US17301333

申请日：2021-03-31

申请人： AT&S Austria Technologie & Systemtechnik Aktiengesellschaft

发明人： Imane Souli ,  Vanesa López Blanco ,  Erich Preiner ,  Martin Schrei

IPC分类号： H05K1/02 ,  H05K1/11 ,  H05K1/18 ,  H05K3/46

CPC分类号： H05K1/0271 ,  H05K1/0204 ,  H05K1/0224 ,  H05K3/467 ,  H05K3/4664 ,  H05K1/11

摘要： A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure, a component embedded in the stack, and a functional film covering at least part of the component and having an inhomogeneous thickness distribution over at least part of a surface of the component.

公开(公告)号：US20190148807A1

公开(公告)日：2019-05-16

申请号：US16183169

申请日：2018-11-07

申请人： RAYTHEON COMPANY

发明人： Thomas V. Sikina ,  John P. Haven ,  James E. Benedict

IPC分类号： H01P3/08 ,  H01P11/00 ,  H05K1/02 ,  H05K1/11 ,  H05K3/04 ,  H05K3/28 ,  H05K3/00 ,  H05K3/10

CPC分类号： H01P3/08 ,  H01P3/085 ,  H01P11/003 ,  H05K1/0219 ,  H05K1/0224 ,  H05K1/115 ,  H05K3/0044 ,  H05K3/04 ,  H05K3/107 ,  H05K3/28 ,  H05K2201/093 ,  H05K2201/09854

摘要： Circuits and methods include transmission lines formed from a conductive cladding on a substrate surface. The transmission line includes additional reference conductors positioned co-planar on the surface, including a gap between the transmission line and each of the reference conductors. The transmission line and the reference conductors are at least partially encapsulated (e.g., sandwiched) between two substrates. Isolation boundaries may be included as ground planes, e.g., above and below the transmission line, on opposing surfaces of the substrates, and Faraday walls, e.g., vertically, through the substrates. Current densities generated by various electromagnetic signals are distributed among the transmission line and the reference conductors (as a tri-conductor arrangement), and may be partially further distributed to the isolation (ground) boundaries.

公开(公告)号：US10079158B2

公开(公告)日：2018-09-18

申请号：US14569438

申请日：2014-12-12

申请人： Intel Corporation

发明人： Jackson Kong ,  Bok Eng Cheah ,  Khang Choong Yong ,  Howard L. Heck ,  Kuan-Yu Chen

IPC分类号： H05K7/00 ,  H01P3/08 ,  H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H05K1/00 ,  H05K1/11 ,  H01P3/00 ,  H01P3/02 ,  H01P5/02 ,  H05K1/02 ,  H01P3/04

CPC分类号： H01L21/486 ,  H01L21/4846 ,  H01L21/4857 ,  H01L23/49822 ,  H01L23/49827 ,  H01L24/10 ,  H01P3/003 ,  H01P3/026 ,  H01P3/04 ,  H01P3/08 ,  H01P3/082 ,  H01P5/028 ,  H05K1/0224 ,  H05K1/0242 ,  H05K1/0245 ,  H05K3/462 ,  H05K3/4638 ,  H05K2201/0376 ,  H05K2201/098 ,  H05K2203/1189

摘要： An interconnect topology that includes vertical trench routing in a substrate is disclosed. In one embodiment, the interconnect comprises a substrate having a plurality of layers including a first ground plane layer; a pair of signal conductors that form a differential signal pair, each conductor of the pair of signal conductors having a first portion and a second portion, the second portion extending from the first portion into at least one of the plurality of layers, wherein width of the second portion is less than width of the first portion; and wherein the first ground plane layer is only a first partial layer and has a first void region that is closer to the pair of signal conductors than the first partial layer.

公开(公告)号：US20180213636A1

公开(公告)日：2018-07-26

申请号：US15928090

申请日：2018-03-22

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： JINWOO CHOI ,  SUNGJUN CHUN ,  JASON L. FRANKEL ,  PAUL R. WALLING ,  ROGER D. WEEKLY

IPC分类号： H05K1/02 ,  G06F17/50

CPC分类号： H05K1/0224 ,  G06F17/5081 ,  H05K1/116 ,  H05K2201/09681 ,  H05K2201/09718 ,  H05K2201/09727 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/53022

摘要： A computer system receives an initial multilayered ceramic package design. The computer system maintains a first selection of mesh line segments of the mesh line segments at a first width and adjusts a second selection of mesh line segments of the plurality of mesh line segments to a second width. The computer system controls fabrication of the multilayered ceramic package based on the modified multilayered ceramic package design.

公开(公告)号：US20180116050A1

公开(公告)日：2018-04-26

申请号：US15334734

申请日：2016-10-26

申请人： FREESCALE SEMICONDUCTOR, INC.

发明人： Robert WENZEL ,  Tingdong Zhou ,  David Clegg

IPC分类号： H05K1/11 ,  H05K3/34 ,  H05K1/14 ,  H05K1/02 ,  H05K1/09

CPC分类号： H05K1/115 ,  H05K1/0224 ,  H05K1/09 ,  H05K1/111 ,  H05K1/144 ,  H05K3/3436 ,  H05K3/3452 ,  H05K2201/041 ,  H05K2201/10378 ,  H05K2201/10734 ,  H05K2203/041

摘要： Embodiments of an interconnect structure are provided, the interconnect structure including: a reference plane structure having a first major surface and a second major surface opposite the first major surface, the reference plane structure including a plurality of through holes from the first major surface to the second major surface; a plurality of conductive columns, each conductive column centered within a through hole; and a plurality of isolation structures, each isolation structure fills an annular region within the through hole between each conductive column and surrounding portion of the reference plane structure.

公开(公告)号：US09955567B2

公开(公告)日：2018-04-24

申请号：US14341834

申请日：2014-07-27

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Jinwoo Choi ,  Sungjun Chun ,  Jason L. Frankel ,  Paul R. Walling ,  Roger D. Weekly

IPC分类号： H05K1/02 ,  G06F17/50 ,  H05K1/11

CPC分类号： H05K1/0224 ,  G06F17/5081 ,  H05K1/116 ,  H05K2201/09681 ,  H05K2201/09718 ,  H05K2201/09727 ,  Y10T29/49004 ,  Y10T29/49155 ,  Y10T29/53022

摘要： A computer system receives an initial multilayered ceramic package design. The computer system maintains a first selection of mesh line segments of the mesh line segments at a first width and adjusts a second selection of mesh line segments of the plurality of mesh line segments to a second width. The computer system controls fabrication of the multilayered ceramic package based on the modified multilayered ceramic package design.

公开(公告)号：US20180070438A1

公开(公告)日：2018-03-08

申请号：US15696270

申请日：2017-09-06

申请人： Nitto Denko Corporation

发明人： Daisuke YAMAUCHI ,  Hiroyuki TANABE

IPC分类号： H05K1/02 ,  H05K1/05 ,  H05K1/11 ,  H05K3/46 ,  G11B5/48

CPC分类号： H05K1/0224 ,  G11B5/484 ,  G11B5/486 ,  H05K1/0228 ,  H05K1/056 ,  H05K1/09 ,  H05K1/115 ,  H05K3/4038 ,  H05K3/4644 ,  H05K2201/0154 ,  H05K2201/0195 ,  H05K2201/09227 ,  H05K2201/09254 ,  H05K2201/093 ,  H05K2201/10083

摘要： In a suspension board, a first insulating layer is formed on a support substrate. A ground layer and a power wiring trace are formed on the first insulating layer. The ground layer has electric conductivity higher than that of the support substrate. A second insulating layer is formed on the first insulating layer to cover the ground layer and the power wiring trace. A write wiring trace is formed on the second insulating layer to overlap with the ground layer. In a stacking direction of the support substrate, the first insulating layer and the second insulating layer, a distance between the ground layer and the write wiring trace is larger than a distance between the power wiring trace and the write wiring trace.