公开(公告)号：US09899407B2

公开(公告)日：2018-02-20

申请号：US15183252

申请日：2016-06-15

Applicant: HunKook Lee

Inventor： HunKook Lee

IPC: H01L27/115 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L28/00

Abstract: A semiconductor device is disclosed. The semiconductor device includes an electrode disposed on a substrate and a plurality of vertical patterns passing through the electrode. The vertical patterns include first vertical patterns arranged to form a rhombus and second vertical patterns arranged to form a non-regular trapezoid or a rhombus.

公开(公告)号：US09935108B2

公开(公告)日：2018-04-03

申请号：US15282208

申请日：2016-09-30

Applicant: Chul-Ho Kim ,  Seunghak Park ,  Sihyun Kim ,  Cheolhong Kim ,  Hunkook Lee ,  Yongju Jung

Inventor： Chul-Ho Kim ,  Seunghak Park ,  Sihyun Kim ,  Cheolhong Kim ,  Hunkook Lee ,  Yongju Jung

IPC: H01L27/1157 ,  H01L27/105 ,  H01L23/528 ,  H01L29/78 ,  H01L27/11565 ,  H01L27/11575 ,  H01L27/11582

CPC classification number: H01L27/1052 ,  H01L23/5283 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7827

Abstract: A semiconductor memory device includes stacks on a substrate, each of the stacks including word lines stacked on the substrate and first and second string selection lines laterally spaced apart from each other, vertical pillars passing through the stacks, and first and second bit lines extending longitudinally in a first direction and alternatingly arranged in a second direction crossing the first direction. In a plan view, at least two adjacent ones of the first bit lines in the second direction and at least one of the second bit lines overlap each vertical pillar. A distance between a center of the vertical pillar and one of the first bit lines is different from that between the center of the vertical pillar and another of the first bit lines.

公开(公告)号：US20170040339A1

公开(公告)日：2017-02-09

申请号：US15183252

申请日：2016-06-15

Applicant: HUNKOOK LEE

Inventor： HUNKOOK LEE

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L28/00

Abstract: A semiconductor device is disclosed. The semiconductor device includes an electrode disposed on a substrate and a plurality of vertical patterns passing through the electrode. The vertical patterns include first vertical patterns arranged to form a rhombus and second vertical patterns arranged to form a non-regular trapezoid or a rhombus.

Abstract translation: 公开了一种半导体器件。 半导体器件包括设置在基板上的电极和穿过电极的多个垂直图案。 垂直图案包括布置成形成菱形的第一垂直图案和布置成形成非规则梯形或菱形的第二垂直图案。

公开(公告)号：US20170194326A1

公开(公告)日：2017-07-06

申请号：US15282208

申请日：2016-09-30

Applicant: CHUL-HO KIM ,  SEUNGHAK PARK ,  SIHYUN KIM ,  CHEOLHONG KIM ,  HUNKOOK LEE ,  YONGJU JUNG

Inventor： CHUL-HO KIM ,  SEUNGHAK PARK ,  SIHYUN KIM ,  CHEOLHONG KIM ,  HUNKOOK LEE ,  YONGJU JUNG

IPC: H01L27/105 ,  H01L29/78 ,  H01L23/528

CPC classification number: H01L27/1052 ,  H01L23/5283 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582 ,  H01L29/7827

Abstract: A semiconductor memory device includes stacks on a substrate, each of the stacks including word lines stacked on the substrate and first and second string selection lines laterally spaced apart from each other, vertical pillars passing through the stacks, and first and second bit lines extending longitudinally in a first direction and alternatingly arranged in a second direction crossing the first direction. In a plan view, at least two adjacent ones of the first bit lines in the second direction and at least one of the second bit lines overlap each vertical pillar. A distance between a center of the vertical pillar and one of the first bit lines is different from that between the center of the vertical pillar and another of the first bit lines.

公开(公告)号：US20160049422A1

公开(公告)日：2016-02-18

申请号：US14695051

申请日：2015-04-24

Applicant: HONGSOO KIM ,  HunKook LEE ,  Jeehoon HWANG

Inventor： HONGSOO KIM ,  HunKook LEE ,  Jeehoon HWANG

IPC: H01L27/115

CPC classification number: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device may include an insulating layer provided in one body on a substrate, a first gate electrode and a second gate electrode disposed on the insulating layer, the first and second gate electrodes extending in a first direction parallel to a top surface of the substrate, a first channel structure penetrating the first gate electrode and the insulating layer so as to be connected to the substrate, a second channel structure penetrating the second gate electrode and the insulating layer so as to be connected to the substrate, and a contact penetrating the insulating layer between the first gate electrode and the second gate electrode. The contact may be connected to a common source region formed in the substrate, and the common source region may have a first conductivity type. Further, the first gate electrode and the second gate electrode may be spaced apart from each other in a second direction at the same level from the substrate, wherein the second direction intersects the first direction and is parallel to the top surface of the substrate.

Abstract translation: 半导体器件可以包括设置在基板上的一个主体中的绝缘层，设置在绝缘层上的第一栅电极和第二栅电极，第一和第二栅电极沿平行于基板顶表面的第一方向延伸 贯穿第一栅极电极和绝缘层以连接到基板的第一通道结构，穿过第二栅极电极和绝缘层的第二通道结构以连接到基板，以及穿过该基板的触点 第一栅极电极和第二栅极电极之间的绝缘层。 接触可以连接到形成在基板中的公共源极区域，并且公共源极区域可以具有第一导电类型。 此外，第一栅极电极和第二栅极电极可以在与基板相同的第二方向上彼此间隔开，其中第二方向与第一方向相交并且平行于基板的顶表面。