公开(公告)号：US20090128232A1

公开(公告)日：2009-05-21

申请号：US11941869

申请日：2007-11-16

申请人： Liping Deng ,  Tiejun Dai ,  Haidong Guo ,  Chieh-Chien Lin ,  Yu-Shen Yang

发明人： Liping Deng ,  Tiejun Dai ,  Haidong Guo ,  Chieh-Chien Lin ,  Yu-Shen Yang

IPC分类号： H03F3/00 ,  H04N5/335

CPC分类号： H03F3/005 ,  H03F3/45183 ,  H03F3/68

摘要： A switch-capacitor (“SC”) amplifier includes a two-stage operational amplifier (“OP-AMP”), an input SC network, and a feedback SC network. The two-stage OP-AMP includes a first OP-AMP stage having an output coupled to an input of a second OP-AMP stage. The input SC network is coupled to an input of the first OP-AMP stage. The feedback SC network is configured to selectively couple the output of the first OP-AMP stage to the input of the first OP-AMP stage during a first phase of operation of the scamplifier and to couple an output of the second OP-AMP stage to the input of the first OP-AMP stage during a second phase of operation of the SC amplifier.

摘要翻译： 开关电容器（“SC”）放大器包括两级运算放大器（“OP-AMP”），输入SC网络和反馈SC网络。 两级OP-AMP包括具有耦合到第二OP-AMP级的输入的输出的第一OP-AMP级。 输入SC网络耦合到第一OP-AMP级的输入端。 反馈SC网络被配置为在放大器的第一操作阶段期间将第一OP-AMP级的输出选择性地耦合到第一OP-AMP级的输入，并且将第二OP-AMP级的输出耦合到 在SC放大器的第二操作阶段期间，第一OP-AMP级的输入。

公开(公告)号：US07456768B2

公开(公告)日：2008-11-25

申请号：US11697509

申请日：2007-04-06

申请人： George S. La Rue ,  Haidong Guo

发明人： George S. La Rue ,  Haidong Guo

IPC分类号： H03M1/00

CPC分类号： H03M1/1245 ,  H03M1/1215 ,  H03M1/468

摘要： An analog-to-digital converter based on an interleaving architecture is disclosed. The analog-to-digital converter can include a first sample and hold circuit for sampling and temporarily storing a first input signal. The analog-to-digital converter can also include a comparator for converting the sampled first input signal into a digital signal in a first time period. The analog-to-digital converter can further include a second sample and hold circuit for sampling and temporarily storing a second input signal in a second time period. The second time period at least partially overlaps with the first time period.

摘要翻译： 公开了一种基于交织架构的模拟 - 数字转换器。 模数转换器可以包括用于采样和临时存储第一输入信号的第一采样和保持电路。 模数转换器还可以包括用于在第一时间段内将采样的第一输入信号转换为数字信号的比较器。 模数转换器还可以包括第二采样和保持电路，用于在第二时间段中采样和临时存储第二输入信号。 第二时间段至少部分地与第一时间段重叠。

公开(公告)号：US07639073B2

公开(公告)日：2009-12-29

申请号：US11941869

申请日：2007-11-16

申请人： Liping Deng ,  Tiejun Dai ,  Haidong Guo ,  Chieh-Chien Lin ,  Yu-Shen Yang

发明人： Liping Deng ,  Tiejun Dai ,  Haidong Guo ,  Chieh-Chien Lin ,  Yu-Shen Yang

IPC分类号： H03F1/02

CPC分类号： H03F3/005 ,  H03F3/45183 ,  H03F3/68

摘要： A switch-capacitor (“SC”) amplifier includes a two-stage operational amplifier (“OP-AMP”), an input SC network, and a feedback SC network. The two-stage OP-AMP includes a first OP-AMP stage having an output coupled to an input of a second OP-AMP stage. The input SC network is coupled to an input of the first OP-AMP stage. The feedback SC network is configured to selectively couple the output of the first OP-AMP stage to the input of the first OP-AMP stage during a first phase of operation of the SC amplifier and to couple an output of the second OP-AMP stage to the input of the first OP-AMP stage during a second phase of operation of the SC amplifier.

摘要翻译： 开关电容器（“SC”）放大器包括两级运算放大器（“OP-AMP”），输入SC网络和反馈SC网络。 两级OP-AMP包括具有耦合到第二OP-AMP级的输入的输出的第一OP-AMP级。 输入SC网络耦合到第一OP-AMP级的输入端。 反馈SC网络被配置为在SC放大器的第一操作阶段期间将第一OP-AMP级的输出选择性地耦合到第一OP-AMP级的输入，并且耦合第二OP-AMP级的输出 在SC放大器的第二操作阶段期间到第一OP-AMP级的输入。

公开(公告)号：US20070236380A1

公开(公告)日：2007-10-11

申请号：US11697509

申请日：2007-04-06

申请人： George La Rue ,  Haidong Guo

发明人： George La Rue ,  Haidong Guo

IPC分类号： H03M1/12

CPC分类号： H03M1/1245 ,  H03M1/1215 ,  H03M1/468

摘要： An analog-to-digital converter based on an interleaving architecture is disclosed. The analog-to-digital converter can include a first sample and hold circuit for sampling and temporarily storing a first input signal. The analog-to-digital converter can also include a comparator for converting the sampled first input signal into a digital signal in a first time period. The analog-to-digital converter can further include a second sample and hold circuit for sampling and temporarily storing a second input signal in a second time period. The second time period at least partially overlaps with the first time period.

摘要翻译： 公开了一种基于交织架构的模拟 - 数字转换器。 模数转换器可以包括用于采样和临时存储第一输入信号的第一采样和保持电路。 模数转换器还可以包括用于在第一时间段内将采样的第一输入信号转换为数字信号的比较器。 模数转换器还可以包括第二采样和保持电路，用于在第二时间段中采样和临时存储第二输入信号。 第二时间段至少部分地与第一时间段重叠。