公开(公告)号：US4392224A

公开(公告)日：1983-07-05

申请号：US177454

申请日：1980-08-12

申请人： Hiromichi Mori ,  Jun Matsumoto ,  Masanobu Fujioka

发明人： Hiromichi Mori ,  Jun Matsumoto ,  Masanobu Fujioka

IPC分类号： H04Q3/52 ,  H04Q11/04

CPC分类号： H04Q11/04

摘要： A speech path switching system in time-divisional electronic telephone switching system for the full availably switching between k number of incoming highways and k number of outgoing highways and each highway having n number of telephone channels comprises (a) k number of speech path memories for temporarily storing telephone signals, provided for each incoming highway, (b) k number of input counters provided for each speech path memory for designating the input address of said speech path memory, said input counter being circularly incremented synchronized with the frame phase of the corresponding incoming highway, (c) k number of holding memories provided for each outgoing highway for designating the read out address of said speech path memory to substantially connect an incoming channel to an outgoing channel, and (d) k number of output counters provided for each holding memory for designating the read out address of the holding memory.

摘要翻译： 时分电子电话交换系统中的语音路径切换系统，用于全部可用地切换k个入站高速公路和k个出站高速公路，并且具有n个电话通道的每个公路包括：（a）k个语音路径存储器，用于 临时存储为每个进入公路提供的电话信号，（b）为每个语音路径存储器提供的k个输入计数器，用于指定所述语音路径存储器的输入地址，所述输入计数器与相应的帧的相位同步地循环递增 （c）为每个输出高速公路提供的k个保持存储器，用于指定所述语音路径存储器的读出地址，以基本上将输入通道连接到输出通道，以及（d）为每个输出通道提供的k个输出计数器 保持用于指定保持存储器的读出地址的存储器。

公开(公告)号：US4309572A

公开(公告)日：1982-01-05

申请号：US70399

申请日：1979-08-28

申请人： Hiromichi Mori ,  Tatsuo Maruyama ,  Jun Matsumoto ,  Yoshikazu Ikeda

发明人： Hiromichi Mori ,  Tatsuo Maruyama ,  Jun Matsumoto ,  Yoshikazu Ikeda

IPC分类号： H04M3/22 ,  H04M3/60 ,  H04Q11/04 ,  H04J3/14 ,  H04M3/20

CPC分类号： H04Q11/04 ,  H04M3/60

摘要： In a telephone switching system having a main-speech-path switch, connected to a plurality of subscribers and a plurality of board trunks, the connection in the main-speech-path switch is controlled as follows. In the first mode, the connection between a calling channel and one of the board trunks and the connection between a called channel and the board trunk are established through the main-path-switch, so as to selectively enable speech between an operator connected to said board trunk and one of a calling subscriber and a called subscriber. In the second mode, the connections between the calling channel and the called channel is directly established in the main-speech-path switch, while simultaneously connecting the two channels to the board trunk through the main-speech-path switch, so as to enable to monitor the speech between the calling subscriber and the called subscriber by the telephone operator. In the third mode, the main-speech-path switch effects only the connection between the calling channel and the called channel, while clearing the connection between said two channels and said board trunk. Thus, the main-speech-path switch is free from the board trunk except for the monitoring and the initial connection operation, and can increase the exchange capability.

摘要翻译： 在具有连接到多个用户的主话音路径切换器和多个电路板干线的电话交换系统中，主语音路径交换机中的连接如下控制。 在第一模式中，通过主路径交换机建立呼叫信道与板中继板之间的连接以及被叫信道与板中继之间的连接，以便选择性地使连接到所述主干路由器 主干线和主叫用户和被叫用户之一。 在第二模式中，在主话音路径交换机中直接建立主叫信道与被叫信道之间的连接，同时通过主语音路径交换机将两个信道同时连接到电路板干线，以使能 监听电话运营商主叫用户和被叫用户之间的语音。 在第三模式中，主语音路径切换仅影响主叫信道与被叫信道之间的连接，同时清除所述两个信道与所述主干之间的连接。 因此，除了监控和初始连接操作之外，主语音路径交换机没有板子中继线，并且可以增加交换能力。

公开(公告)号：US4124777A

公开(公告)日：1978-11-07

申请号：US826963

申请日：1977-08-22

申请人： Hiromichi Mori ,  Yoshikazu Ikeda

发明人： Hiromichi Mori ,  Yoshikazu Ikeda

IPC分类号： H04Q11/04 ,  H04J3/17 ,  H04J3/16

CPC分类号： H04J3/17

摘要： In a transmission station, the information from each channel is sampled and encoded to a PCM form having a predetermined length of bits. The group of said bits together with line number bits is called a signal block. Only significant signal blocks from all the channels are transmitted to a receiving station through a buffer memory provided at a transmission station and a common transmission line. The receiving station receives the signal blocks through a buffer memory provided at the receiving station and inserts an idle signal to the portion where the transmission station removes a signal block due to an insignificant signal block. The received signal blocks are distributed to each receiving channel, thus, the original signal is reproduced at the receiving station.

摘要翻译： 在发送站中，来自每个信道的信息被采样并编码成具有预定长度位的PCM形式。 所述位组与行号位一起称为信号块。 只有来自所有信道的有效信号块通过设置在发送站和公共传输线路上的缓冲存储器传送到接收站。 接收站通过设置在接收站的缓冲存储器接收信号块，并且将空闲信号插入到发送站由于无效信号块而移除信号块的部分。 所接收的信号块被分配到每个接收信道，因此原始信号在接收站被再现。

公开(公告)号：US4421955A

公开(公告)日：1983-12-20

申请号：US296616

申请日：1981-08-27

申请人： Hiromichi Mori ,  Jun Matsumoto ,  Masanobu Fujioka

发明人： Hiromichi Mori ,  Jun Matsumoto ,  Masanobu Fujioka

IPC分类号： H04Q3/545 ,  H04M3/00 ,  H04Q3/54 ,  H04Q11/04 ,  H04Q3/42

CPC分类号： H04Q11/0407

摘要： A distributed switching system is disclosed which includes a plurality of simple-function switching units interconnected by speech path links, each unit having a speech-path switch, a plurality of processing units connected to speech-paths for use in signal and call processing, and an inter-unit bus for the connection between the switching units and the processing units, and functions as a single large switching system as a whole.

摘要翻译： 公开了一种分布式交换系统，其包括通过语音路径链路互连的多个简单功能交换单元，每个单元具有语音路径交换机，连接到用于信号和呼叫处理的语音路径的多个处理单元，以及 用于开关单元和处理单元之间的连接的单元间总线，并且作为整体用作单个大型交换系统。

公开(公告)号：US5798878A

公开(公告)日：1998-08-25

申请号：US747492

申请日：1996-11-12

申请人： Kouki Asari ,  Hiromichi Mori ,  Eiichi Sakai

发明人： Kouki Asari ,  Hiromichi Mori ,  Eiichi Sakai

IPC分类号： G02B23/02 ,  G01J9/00 ,  G02B5/10 ,  G02B7/18 ,  G02B7/198 ,  G02B26/06 ,  G02B5/08 ,  G02B7/182 ,  G02B7/188 ,  G02B7/192

CPC分类号： G02B26/06 ,  G01J9/00

摘要： The control of a mirror's shape, such as for use in large reflecting telescopes, is associated with discrete points so as to avoid incurring constraints and exerting undesirable stress on the reflecting mirror through control unrelated to the mechanical characteristics. Thus, a reflecting mirror is approximated by a non-constrained circular plate having a similar mechanical structure, and an eigenfunction value arithmetic unit calculates values of Bessel-Fourier functions which are eigenfunctions of free vibrations of the circular plate. Using these function values, a mode displacement identification unit approximates a required mirror displacement, which is necessary to correct for wavefront distortion, with a linear combination up to a prescribed mode of vibration of the eigenfunction. A support mechanism command unit controls an actuator so that the value of the linear combination function equals the amount of mirror displacement at a position supported by a reflecting mirror support mechanism.

摘要翻译： 反射镜的形状的控制，例如用于大型反射望远镜，与离散点相关联，以避免产生约束并通过与机械特性无关的控制在反射镜上施加不期望的应力。 因此，反射镜由具有类似机械结构的非约束圆板近似，本征函数值运算单元计算作为圆板自由振动的本征函数的贝塞尔 - 傅里叶函数的值。 使用这些功能值，模式位移识别单元近似所需的镜像位移，其是校正波前失真所必需的镜像位移，具有直到本征函数的规定振动模式的线性组合。 支撑机构指令单元控制致动器，使得线性组合功能的值等于由反射镜支撑机构支撑的位置处的镜像位移量。

公开(公告)号：US4703422A

公开(公告)日：1987-10-27

申请号：US687160

申请日：1984-12-28

申请人： Toshiyuki Kinoshita ,  Toshiaki Arai ,  Takao Sato ,  Takashige Kubo ,  Yasufumi Yoshizawa ,  Hiromichi Mori

发明人： Toshiyuki Kinoshita ,  Toshiaki Arai ,  Takao Sato ,  Takashige Kubo ,  Yasufumi Yoshizawa ,  Hiromichi Mori

IPC分类号： G06F12/08 ,  G06F9/50 ,  G06F12/12 ,  G06F13/00

CPC分类号： G06F9/5016 ,  G06F12/122

摘要： In a memory hierarchy system having two or more hierarchy storages of different access speeds and programs and/or data to be loaded on the hierarchy storages, an activity information acquisition unit and a display unit are provided to present information regarding selection of programs and/or data to be loaded on a higher level in memory hierarchy, a unit is provided which automatically decides loading of the programs and/or data on the higher level and executes reallocation of the programs and/or data on the basis of the information, and a unit is provided which permits the user to change the loading by using a user command. The user can make full use of these units during execution of the memory hierarchy control. In an embodiment, priority for the programs and/or data to be loaded on the higher level is calculated and decided. The programs and/or data are written into the real storage in accordance with their priority to increase the real storage hit rate upon occurrence of a next request for loading.

摘要翻译： 在具有不同访问速度的两个或多个层次存储器和要加载在层级存储器上的程序和/或数据的存储器层次系统中，提供活动信息获取单元和显示单元以呈现关于程序选择和/或 要在存储器层级中的较高级别上加载的数据，提供了一个单元，其自动地决定上级程序和/或数据的加载，并且基于该信息执行程序和/或数据的重新分配，并且 提供了允许用户通过使用用户命令改变负载的单元。 用户可以在执行存储器层级控制时充分利用这些单元。 在一个实施例中，计算并确定要在较高级上加载的程序和/或数据的优先级。 根据其优先级将程序和/或数据写入真实存储器，以在下一次加载请求发生时增加真实的存储命中率。

公开(公告)号：US4740953A

公开(公告)日：1988-04-26

申请号：US860396

申请日：1986-05-07

申请人： Jun Matsumoto ,  Hiromichi Mori

发明人： Jun Matsumoto ,  Hiromichi Mori

IPC分类号： H04Q3/52 ,  H04Q11/04 ,  H04Q11/08

CPC分类号： H04Q11/08

摘要： A time division speech path switch for an electronic exchange system has a plurality of speech path memories for each input highway, and an input highway information is stored simultaneously in all of said speech path memories. The number of said input highway memories is equal to number of output highways, and each speech path memory can store at least one frame information of an input highway. A holding memory is provided at each output highway. A switched output signal is read out of one of said speech path memories according to content of the holding memory coupled with the output highway. According to the invention which has a plurality of input speech path memories and a plurality of holding memories, instead of a single speech path memory and a single holding memory of a prior art, an operational speed of a speech path memory and a holding memory may be slow as compared with that of a prior art. And, a large capacity of exchange system may be designed by using a low speed memory device.

摘要翻译： 用于电子交换系统的时分语音路径开关具有用于每个输入公路的多个语音路径存储器，并且输入公路信息被同时存储在所有所述语音路径存储器中。 所述输入高速公路存储器的数量等于输出高速公路的数量，并且每个语音路径存储器可以存储输入高速公路的至少一个帧信息。 在每条输出高速公路上设有保持存储器。 根据与输出高速公路耦合的保持存储器的内容，从所述语音路径存储器之一读出切换输出信号。 根据具有多个输入语音路径存储器和多个保持存储器的本发明，代替现有技术的单个语音路径存储器和单个保持存储器，语音路径存储器和保持存储器的操作速度可以 与现有技术相比较慢。 并且，可以通过使用低速存储器件来设计大容量的交换系统。