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公开(公告)号：US08174573B2
公开(公告)日：2012-05-08
申请号：US12204871
申请日：2008-09-05
Applicant: Hsin-Chieh Lin , Julian Lin
Inventor： Hsin-Chieh Lin , Julian Lin
IPC: H04N7/18
CPC classification number: H04N5/2252 , G08B13/19619
Abstract: A monitoring camera has a base, a camera module and a casing. The base has a parapet formed on the base. The parapet has a memory slot and at least one pair of guide slots formed oppositely on the parapet. Each guide slot has a notch extending toward the bottom of the parapet. The casing corresponds to and covers the parapet and has at least one pair of guide protrusions formed on the casing. The guide protrusions respectively engage corresponding guide slots. When unscrewing the casing, the guide protrusions will correspondingly move and be mounted in the notches and the memory slot is accessible. Therefore, the casing need not to be completely detached from the base to allow a removable memory to be installed or removed easily.
Abstract translation: 监控摄像机具有基座，相机模块和外壳。 基地有一个在基地形成的护栏。 护栏具有存储槽和在栏杆上相对形成的至少一对引导槽。 每个导槽具有向栏杆底部延伸的凹口。 壳体对应于并且覆盖栏杆并且具有形成在壳体上的至少一对引导突起。 引导突起分别接合相应的引导槽。 当旋转外壳时，引导突起将相应地移动并安装在凹口中，并且存储器插槽可接近。 因此，壳体不需要从基座完全分离，从而容易地安装或移除可移动存储器。
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公开(公告)号：US20100060731A1
公开(公告)日：2010-03-11
申请号：US12204871
申请日：2008-09-05
Applicant: Hsin-Chieh Lin , Julian Lin
Inventor： Hsin-Chieh Lin , Julian Lin
IPC: H04N7/18
CPC classification number: H04N5/2252 , G08B13/19619
Abstract: A monitoring camera has a base, a camera module and a casing. The base has a parapet formed on the base. The parapet has a memory slot and at least one pair of guide slots formed oppositely on the parapet. Each guide slot has a notch extending toward the bottom of the parapet. The casing corresponds to and covers the parapet and has at least one pair of guide protrusions formed on the casing. The guide protrusions respectively engage corresponding guide slots. When unscrewing the casing, the guide protrusions will correspondingly move and be mounted in the notches and the memory slot is accessible. Therefore, the casing need not to be completely detached from the base to allow a removable memory to be installed or removed easily.
Abstract translation: 监控摄像机具有基座，相机模块和外壳。 基地有一个在基地形成的护栏。 护栏具有存储槽和在栏杆上相对形成的至少一对引导槽。 每个导槽具有向栏杆底部延伸的凹口。 壳体对应于并且覆盖栏杆并且具有形成在壳体上的至少一对引导突起。 引导突起分别接合相应的引导槽。 当旋转外壳时，引导突起将相应地移动并安装在凹口中，并且存储器插槽可接近。 因此，壳体不需要从基座完全分离，从而容易地安装或移除可移动存储器。
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公开(公告)号：US07016450B2
公开(公告)日：2006-03-21
申请号：US10064215
申请日：2002-06-21
Applicant: Jyh-Fong Lin , Hsin-Chieh Lin , Yi-Bin Hsieh
Inventor： Jyh-Fong Lin , Hsin-Chieh Lin , Yi-Bin Hsieh
IPC: H03D3/24
CPC classification number: H03L7/0891 , H03L7/093 , H03L7/18
Abstract: A clock recovery circuit for generating an output signal that is synchronized with an input signal. The clock recovery circuit includes a charge pump, a first filter, an oscillator, a switch circuit, and a second filter. When the charge pump operates, the switch circuit will disconnect the first filter from the oscillator. Additionally, when the charge pump stops operating, the switch circuit will connect the first filter and the oscillator such that the oscillator adjusts a frequency or phase of the output signal according to the output voltage of the first filter.
Abstract translation: 一种用于产生与输入信号同步的输出信号的时钟恢复电路。 时钟恢复电路包括电荷泵，第一滤波器，振荡器，开关电路和第二滤波器。 当电荷泵运行时，开关电路将使第一个滤波器与振荡器断开。 此外，当电荷泵停止工作时，开关电路将连接第一滤波器和振荡器，使得振荡器根据第一滤波器的输出电压来调节输出信号的频率或相位。
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公开(公告)号：US6005426A
公开(公告)日：1999-12-21
申请号：US73746
申请日：1998-05-06
Applicant: Jyhfong Lin , Hsin-Chieh Lin
Inventor： Jyhfong Lin , Hsin-Chieh Lin
CPC classification number: H03L7/0814 , H03L7/10
Abstract: A low-jitter delay locked loop having an expanded phase locking range without the necessity of setting the initial delay is provided. The loop is to be supplied by a system clock and includes a pulse generator receiving the system clock for generating a first pulse signal and a second pulse signal in response to a triggering signal, a delay device receiving the system clock for providing a delayed clock in response to a control signal, a frequency-reducing device for frequency-reducing the system clock into a first clock in response to the first pulse signal and frequency-reducing the delayed clock into a second clock in response to the second pulse signal, and a comparator for comparing the first and second clocks to generate the control signal.
Abstract translation: 提供具有扩展相位锁定范围的低抖动延迟锁定环，而不需要设置初始延迟。 该回路由系统时钟提供，并且包括接收用于响应于触发信号产生第一脉冲信号和第二脉冲信号的系统时钟的脉冲发生器，延迟装置接收用于提供延迟时钟的系统时钟 响应于控制信号的频率降低装置，用于响应于第一脉冲信号将系统时钟频率降低到第一时钟并响应于第二脉冲信号将延迟的时钟频率降低到第二时钟的频率降低装置，以及 比较器，用于比较第一和第二时钟以产生控制信号。
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公开(公告)号：US20100129817A1
公开(公告)日：2010-05-27
申请号：US12597694
申请日：2008-05-02
Applicant: Yi Wei , Lynn MacDonald , Hsin Chieh Lin
Inventor： Yi Wei , Lynn MacDonald , Hsin Chieh Lin
CPC classification number: G01N33/6842 , C12Q1/6813 , G01N33/56966
Abstract: Methods and compositions for selecting ES cells that are germline competent are provided, including gene expression arrays of from one to about 300 or more genes. Selecting ES cells that are competent for germline transmission by comparing the expression of one or more genes between an ES cell that is competent at germline transmission with an ES cell of interest is described. Selecting ES cells likely to be competent at germline transmission, based on their level of expression of gtl2, is also described.
Abstract translation: 提供了选择具有种系能力的ES细胞的方法和组合物，包括1至约300个或更多个基因的基因表达阵列。 描述通过比较在种系传播下有能力的ES细胞与感兴趣的ES细胞之间的一个或多个基因的表达来选择能够进行种系传播的ES细胞。 还描述了基于其gtl2的表达水平选择可能在种系传播方面胜任的ES细胞。
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Patent Agency Ranking
6.发明授权公开(公告)号：US07378095B2
公开(公告)日：2008-05-27
申请号：US11193746
申请日：2005-07-29
Applicant: Jingtai Cao , Li-Hsien Wang , Hsin Chieh Lin , Mark W. Sleeman , Stanley J. Wiegand
Inventor： Jingtai Cao , Li-Hsien Wang , Hsin Chieh Lin , Mark W. Sleeman , Stanley J. Wiegand
CPC classification number: A61K38/179 , A61K38/28 , A61K48/00 , C12N15/1136 , C12N2310/11 , C12N2310/14 , A61K2300/00
Abstract: Methods of treating diabetes in mammals, particularly humans, by blocking or inhibiting VEGF-mediated activity. A preferred inhibitor of VEGF-mediated activity is a VEGF antagonist such as the VEGF fusion protein trap of SEQ ID NO:2 capable of binding and blocking VEGF. The method of the invention may be combined with other therapies, such as with insulin therapy.
Abstract translation: 通过阻断或抑制VEGF介导的活性来治疗哺乳动物，特别是人类的糖尿病的方法。 VEGF介导的活性的优选抑制剂是VEGF拮抗剂，例如能够结合和阻断VEGF的SEQ ID NO：2的VEGF融合蛋白捕获物。 本发明的方法可以与其它疗法组合，例如用胰岛素治疗。
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公开(公告)号：US07106235B1
公开(公告)日：2006-09-12
申请号：US11139475
申请日：2005-05-31
Applicant: Ming-Chou Yen , Hsin-Chieh Lin , Kun-Ying Tsai , Jui-Tai Ko , Chun-Wang Wei
Inventor： Ming-Chou Yen , Hsin-Chieh Lin , Kun-Ying Tsai , Jui-Tai Ko , Chun-Wang Wei
IPC: H03M1/66
Abstract: An active hybrid circuit for a full duplex channel generates a duplicated voltage at the current output stage to reduce the energy of the transmitter transmitted to the receiver. The active hybrid circuit cancels the energy of the transmitter transmitted to the receiver when it is operated in a full duplex channel with high-speed transmission. The active hybrid circuit for full a duplex channel comprises a transmit digital-to-analog converter for generating an analog transmit signal, a receive analog-to-digital converter for receiving an analog receive signal, a duplicated voltage digital-to-analog converter for generating a corresponding duplicated voltage according to the analog transmit signal of the transmit digital-to-analog converter, and a plurality of signal combiners for subtracting the duplicated voltage from the analog transmit signal to cancel the influence of analog transmit signal to the analog receive signal.
Abstract translation: 用于全双工信道的主动混合电路在当前输出级产生复制电压，以减少发送到接收机的发射机的能量。 当主动混合电路在具有高速传输的全双工信道中工作时，消除发射到接收机的发射机的能量。 用于全双工通道的主动混合电路包括用于产生模拟发射信号的发射数模转换器，用于接收模拟接收信号的接收模数转换器，用于接收模拟接收信号的复制电压数/模转换器， 根据发射数模转换器的模拟发射信号产生相应的重复电压，以及多个信号组合器，用于从模拟发射信号中减去复制电压，以消除模拟发射信号对模拟接收信号的影响 。
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公开(公告)号：US06859027B2
公开(公告)日：2005-02-22
申请号：US10064767
申请日：2002-08-15
Applicant: Sung-Hung Li , Steven Su , Hsin-Chieh Lin
Inventor： Sung-Hung Li , Steven Su , Hsin-Chieh Lin
CPC classification number: H03L7/089 , H03D13/004 , H03L7/0891
Abstract: A device and method for measuring the jitters of phase locked loop signals. A phase lead or phase lag relationship between an input signal and an output signal of a phase locked loop is found. According to the phase relationship and using multiplexers, a first phase difference signal and a second phase difference signal are re-routed to a subtraction unit and produces a jitter-level output signal. The jitter-level output signal represents the absolute value of the difference of pulse width between the first phase difference signal and the second phase difference signal.
Abstract translation: 一种用于测量锁相环信号抖动的装置和方法。 发现输入信号和锁相环路的输出信号之间的相位相位或相位滞后关系。 根据相位关系和使用多路复用器，将第一相位差信号和第二相位差信号重新路由到减法单元并产生抖动电平输出信号。 抖动电平输出信号表示第一相位差信号和第二相位差信号之间的脉冲宽度差的绝对值。
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公开(公告)号：US06233528B1
公开(公告)日：2001-05-15
申请号：US09148949
申请日：1998-09-08
Applicant: Jiin Lai , Jyhfong Lin , Hsin-Chieh Lin
Inventor： Jiin Lai , Jyhfong Lin , Hsin-Chieh Lin
IPC: G01R1300
CPC classification number: G01R31/31709 , G01R31/3016
Abstract: A signal-testing device used with a tester for testing a first signal and a second signal includes a selected signal generator receiving first signal and second signal for generating a selected signal the state of which is changed when first signal and second signal are in specific states, and a signal selector for selectively outputting one of first and second signals in response to the selected signal state. The present invention also provides a signal-testing method including steps of a) generating a selected signal having a plurality of pulses in response to a first signal and a second signal, b) obtaining a plurality of time differences between times when two inter-adjacent respective pulses respectively reach a specific voltage, c) obtaining a plurality of absolute values between two inter-adjacent respective time differences, and d) obtaining a phase difference by dividing by 2 an average value of the absolute values.
Abstract translation: 与用于测试第一信号和第二信号的测试仪一起使用的信号测试装置包括接收第一信号的选择信号发生器和用于产生当第一信号和第二信号处于特定状态时其状态改变的选择信号的第二信号 以及信号选择器，用于响应于所选择的信号状态选择性地输出第一和第二信号之一。 本发明还提供了一种信号测试方法，包括以下步骤：a）响应于第一信号和第二信号产生具有多个脉冲的选定信号，b）获得两个相邻时间之间的多个时间差 各个脉冲分别达到特定电压，c）在两个相邻的相应时间差之间获得多个绝对值，以及d）通过将绝对值的平均值除以2来获得相位差。
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10.发明申请公开(公告)号：US20080300181A1
公开(公告)日：2008-12-04
申请号：US11725071
申请日：2007-03-16
Applicant: Li-Hsien Wang , H. L. Hsin Chieh Lin , Margaret Karow
Inventor： Li-Hsien Wang , H. L. Hsin Chieh Lin , Margaret Karow
CPC classification number: A61K38/1793 , C07K2319/30 , C07K2319/32
Abstract: Methods of using interleukin-1 (IL-1) antagonists to prevent or treat restenosis and other neointimal hyperplasia conditions, including atherosclerosis, vascular access dysfunction, hypertension and related vascular diseases are provided.
Abstract translation: 提供了使用白细胞介素-1（IL-1）拮抗剂预防或治疗再狭窄和其它新生内膜增生病症（包括动脉粥样硬化，血管通路功能障碍，高血压和相关血管疾病）的方法。
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