Circuit and method for linearizing amplitude modulation in a power amplifier
    1.
    发明授权
    Circuit and method for linearizing amplitude modulation in a power amplifier 有权
    用于在功率放大器中线性化幅度调制的电路和方法

    公开(公告)号:US06191653B1

    公开(公告)日:2001-02-20

    申请号:US09195384

    申请日:1998-11-18

    IPC分类号: H03F338

    摘要: An RF amplifier includes an oscillator developing an RF input signal to be transmitted. A power amplifier receives the RF input signal and amplifies the RF input signal to develop an RF output signal. An amplifier control is operatively associated with the oscillator and the power amplifier. The amplifier control includes means for developing a control signal representing a desired amplitude of the RF output signal. A memory stores correction information correlating actual amplitude of the RF output signal relative to the control signal, and a control varies the power amplifier circuit supply voltage using the control signal modified responsive to the correction information for the desired amplitude.

    摘要翻译: RF放大器包括形成要传输的RF输入信号的振荡器。 功率放大器接收RF输入信号并放大RF输入信号以产生RF输出信号。 放大器控制与振荡器和功率放大器可操作地相关联。 放大器控制包括用于开发表示RF输出信号的期望幅度的控制信号的装置。 存储器存储与RF输出信号的实际振幅相对于控制信号相关的校正信息,并且控制使用响应于校正信息修改了所需幅度的控制信号来改变功率放大器电路电源电压。

    Wireless communications with transceiver-integrated frequency shift control and power control
    2.
    发明申请
    Wireless communications with transceiver-integrated frequency shift control and power control 有权
    无线通信与收发器集成的变频控制和功率控制

    公开(公告)号:US20060188010A1

    公开(公告)日:2006-08-24

    申请号:US11061947

    申请日:2005-02-18

    IPC分类号: H04B1/38

    CPC分类号: H04B1/40

    摘要: Baseband processor and communication overloading can be relieved in a portable wireless communication terminal by decentralizing power control (38, 39) and frequency shift control (75) functions that are conventionally concentrated in the baseband processor. A timing sequencer (31) for power control can be integrated into a transceiver of the portable wireless communications terminal, thereby advantageously permitting power control signals to be generated on the transceiver side (27, 29) rather than the baseband processor side. Shadow registers (74) containing information indicative of commonly used or repeated frequencies can be integrated into the transceiver side, thereby advantageously relieving the baseband processor of corresponding frequency shift control responsibilities. These responsibilities can be further relieved by integrating into the transceiver side a sequencer (86) cooperable with the shadow registers for controlling frequency shifting of a frequency generator on the transceiver side, and by integrating into the transceiver side further shadow registers (85) for programming the sequencer with desired frequency shift sequences.

    摘要翻译: 基带处理器和通信过载可以通过分散传统集中在基带处理器中的功率控制(38,39)和频移控制(75)功能在便携式无线通信终端中减轻。 用于功率控制的定时定序器(31)可以集成到便携式无线通信终端的收发器中,从而有利地允许在收发机侧(27,29)而不是基带处理器侧产生功率控制信号。 可以将包含指示常用或重复频率的信息的影子寄存器(74)集成到收发机侧,从而有利地减轻基带处理器相应的频移控制责任。 通过将收发机侧集成到与影子寄存器配合的用于控制收发机侧的频率发生器的频移的定序器(86),并且通过将用于编程的另外的影子寄存器(85)集成到收发机侧,可以进一步减轻这些责任 具有期望的频移序列的定序器。

    IQ modulation systems and methods that use separate phase and amplitude signal paths
    3.
    发明授权
    IQ modulation systems and methods that use separate phase and amplitude signal paths 有权
    IQ调制系统和方法使用单独的相位和幅度信号路径

    公开(公告)号:US06975686B1

    公开(公告)日:2005-12-13

    申请号:US09703037

    申请日:2000-10-31

    摘要: A digital signal processor generates in-phase, quadrature-phase and amplitude signals from a baseband signal. A modulator modulates the in-phase and quadrature-phase signals to produce a modulated signal. A phase locked loop is responsive to the modulated signal. The phase locked loop includes a controlled oscillator having a controlled oscillator input. An amplifier includes a signal input, amplitude control input and an output. The signal input is responsive to the controlled oscillator output and the amplitude control input is responsive to the amplitude signal. The in-phase and quadrature-phase signals may be normalized in-phase and quadrature-phase signals. Alternatively, a phase tracking subsystem may be provided that is responsive to the quadrature modulator to produce a phase signal that is responsive to phase changes in the modulated signal and that is independent of amplitude changes in the modulated signal. An amplitude tracking subsystem also may be provided that is responsive to the modulator to produce an amplitude system that is responsive to amplitude changes in the modulated signal and that is independent of the phase changes in the modulated signal. An amplifier has a signal output, an amplitude control input and an output. The signal input is responsive to the phase signal and the amplitude control input is responsive to the amplitude signal.

    摘要翻译: 数字信号处理器从基带信号产生同相,正交相位和幅度信号。 调制器调制同相和正交相位信号以产生调制信号。 锁相环对调制信号作出响应。 锁相环包括具有受控振荡器输入的受控振荡器。 放大器包括信号输入,幅度控制输入和输出。 信号输入响应于受控振荡器输出,并且幅度控制输入响应振幅信号。 同相和正交相信号可以是归一化的同相和正交相位信号。 或者,可以提供响应于正交调制器的相位跟踪子系统,以产生响应于调制信号中的相位变化并且与调制信号中的幅度变化无关的相位信号。 还可以提供振幅跟踪子系统,其响应于调制器产生响应于调制信号中的幅度变化并且与调制信号中的相位变化无关的振幅系统。 放大器具有信号输出,幅度控制输入和输出。 信号输入响应于相位信号,幅度控制输入响应振幅信号。

    On-channel transceiver architecture in a dual band mobile phone
    4.
    发明授权
    On-channel transceiver architecture in a dual band mobile phone 失效
    双频手机中的在线收发器架构

    公开(公告)号:US5890051A

    公开(公告)日:1999-03-30

    申请号:US42554

    申请日:1998-03-17

    IPC分类号: H03D7/16 H04B1/40 H04B1/26

    摘要: According to a second embodiment of the invention, a mobile phone receiver comprises a first down converter using a first local oscillator frequency which can be tuned in frequency steps by a programmable digital frequency synthesizer PLL which is locked to a reference frequency. The first down converter converts received signals to a first IF for filtering. A second down converter using a second local oscillator converts first IF signals to a second IF. The second local oscillator frequency is generated using a second digital frequency synthesizer PLL which locks the second oscillator to the reference frequency. A third down converter mixes the transmit frequency with the first local oscillator frequency to produce a lock frequency. A third digital frequency synthesizer PLL compares the lock frequency and the reference frequency to control generation of the transmit frequency.

    摘要翻译: 根据本发明的第二实施例,移动电话接收机包括使用第一本地振荡器频率的第一下变换器,该第一本地振荡器频率可以通过被锁定到参考频率的可编程数字频率合成器PLL进行频率调节。 第一降压转换器将接收的信号转换为第一IF用于滤波。 使用第二本地振荡器的第二降压转换器将第一IF信号转换为第二IF。 使用将第二振荡器锁定到参考频率的第二数字频率合成器PLL产生第二本地振荡器频率。 第三降压转换器将发射频率与第一本地振荡器频率混合以产生锁频率。 第三数字频率合成器PLL比较锁定频率和参考频率,以控制发射频率的产生。