EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY
    2.
    发明申请
    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY 有权
    E-BEAM LITHOGRAPHY的高效扫描

    公开(公告)号:US20130320243A1

    公开(公告)日:2013-12-05

    申请号:US13484524

    申请日:2012-05-31

    IPC分类号: G21K5/10

    摘要: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度(MSSW)扫描晶片。 通过限制集成电路(IC)场尺寸以允许MSSW覆盖整个场,MSSW被应用于减小晶片的扫描通道,从而增加吞吐量。 当用MSSW扫描晶片时,下一个扫描通道数据可以重新排列并加载到存储器缓冲器中。 因此,一旦一个扫描通道完成,读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    Data process for E-beam lithography
    3.
    发明授权
    Data process for E-beam lithography 有权
    电子束光刻数据处理

    公开(公告)号:US08563224B1

    公开(公告)日:2013-10-22

    申请号:US13487850

    申请日:2012-06-04

    IPC分类号: G03C5/00 G03F1/20

    摘要: The present disclosure provides a dithering method of increasing wafer throughput by an electron beam lithography system. The dithering method generates an edge map from a vertex map. The vertex map is generated from an integrated circuit design layout (such as an original pattern bitmap). A gray map (also referred to as a pattern gray map) is also generated from the integrated circuit design layout. By combining the edge map with the gray map, a modified integrated circuit design layout (modified pattern bitmap) is generated for use by the electron beam lithography system.

    摘要翻译: 本公开提供了通过电子束光刻系统增加晶片生产量的抖动方法。 抖动方法从顶点图生成边缘图。 顶点图是从集成电路设计布局(如原始图案位图)生成的。 也从集成电路设计布局生成灰色地图(也称为图案灰度图)。 通过将边缘图与灰度图组合,生成修改后的集成电路设计布局(修改图案位图),供电子束光刻系统使用。

    Level adjustment systems and adjustable pin chuck thereof
    4.
    发明授权
    Level adjustment systems and adjustable pin chuck thereof 失效
    液位调节系统及其可调针式卡盘

    公开(公告)号:US07659964B2

    公开(公告)日:2010-02-09

    申请号:US11390944

    申请日:2006-03-28

    IPC分类号: G03B27/58

    摘要: A level adjustment system. The level adjustment system includes an adjustable pin chuck, an evacuation device, a level detection device and a length control device. The adjustable pin chuck includes a base and a variable pin to support a substrate. The base includes a recess and an evacuation channel connected thereto. The variable pin is disposed in the recess. The evacuation device is connected to the evacuation channel to evacuate the recess, such that the substrate is attached to the base and variable pin. The level detection device is disposed on the adjustable pin chuck to detect the horizontality of a target surface of the substrate. The length control device is electrically connected to the level detection device and variable pin. The length control device changes the length of the variable pin to adjust level of the target surface of the substrate according to the detected horizontality.

    摘要翻译: 水平调整系统。 液位调节系统包括可调节销卡盘,排气装置,液位检测装置和长度控制装置。 可调销卡盘包括基座和可变销以支撑基板。 基座包括与其连接的凹部和排气通道。 可变销设置在凹槽中。 排气装置连接到排气通道以排出凹部,使得基板附接到基座和可变销。 电平检测装置设置在可调节销卡盘上以检测基板的目标表面的水平度。 长度控制装置电连接到电平检测装置和可变引脚。 长度控制装置根据检测到的水平度改变可变销的长度,以调整基板的目标表面的水平。

    System and Method for Direct Writing to a Wafer
    5.
    发明申请
    System and Method for Direct Writing to a Wafer 有权
    直接写入晶片的系统和方法

    公开(公告)号:US20090268184A1

    公开(公告)日:2009-10-29

    申请号:US12203494

    申请日:2008-09-03

    IPC分类号: G03B27/54

    摘要: A direct-write (DW) exposure system is provided which includes a stage for holding a substrate and configured to scan the substrate along an axis during exposure, a data processing module for processing pattering data and generating instructions associated with the patterning data, and an exposure module that includes a plurality of beams that are focused onto the substrate such that the beams cover a width that is larger than a width of a field size and a beam controller that controls the plurality of beams in accordance with the instructions as the substrate is scanned along the axis. The widths are in a direction different from the axis.

    摘要翻译: 提供了一种直接写入(DW)曝光系统,其包括用于保持衬底并被配置为在曝光期间沿着轴扫描衬底的台,用于处理图案数据并产生与图案形成数据相关联的指令的数据处理模块,以及 曝光模块,其包括聚焦在基板上的多个光束,使得光束覆盖大于场大小的宽度的宽度;以及根据作为衬底的指令来控制多个光束的光束控制器 沿轴扫描。 宽度在与轴不同的方向。

    Segmented box-in-box for improving back end overlay measurement

    公开(公告)号:US5919714A

    公开(公告)日:1999-07-06

    申请号:US72990

    申请日:1998-05-06

    IPC分类号: G03F7/20 H01L21/00

    CPC分类号: G03F7/70633 Y10S438/975

    摘要: An improvement in the box-in-box overlay measurement method has been achieved by forming the outer box from a segmented trench comprised of a number of concentric ridges that project upwards from the floor of the trench. When the segmented trench has been overfilled with tungsten (or similar metal) the excess metal is removed using either etch-back or chem. mech. polishing as the planarizing technique. Because of the presence of the ridges, the trench (i.e. the outer box) becomes reproducibly easy to see when the inner box (which will be etched from a second layer deposited on the first one) is being positioned inside it. Furthermore, the tendency for the outer box to be broken in critical places (often seen in the prior art) is now largely eliminated.

    Efficient scan for E-beam lithography
    7.
    发明授权
    Efficient scan for E-beam lithography 有权
    电子束光刻的高效扫描

    公开(公告)号:US08987689B2

    公开(公告)日:2015-03-24

    申请号:US13484524

    申请日:2012-05-31

    IPC分类号: A61N5/00

    摘要: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度(MSSW)扫描晶片。 通过限制集成电路(IC)场尺寸以允许MSSW覆盖整个场,MSSW被应用于减小晶片的扫描通道,从而增加吞吐量。 当用MSSW扫描晶片时,可以将下一个扫描通道数据重新排列并加载到存储器缓冲器中。 因此,一旦一个扫描通道完成,读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    Apparatus for charged particle lithography system
    8.
    发明授权
    Apparatus for charged particle lithography system 有权
    带电粒子光刻系统的装置

    公开(公告)号:US08677511B2

    公开(公告)日:2014-03-18

    申请号:US13462315

    申请日:2012-05-02

    IPC分类号: G01Q20/02

    CPC分类号: G01B11/026

    摘要: The present disclosure describes an apparatus of leveling a substrate in a charged particle lithography system. In an example, the apparatus includes a cantilever-based sensor that includes an optical sensor and a cantilever structure. The optical sensor determines a distance between the optical sensor and a surface of the substrate based on light reflected from the cantilever structure. In an example, a first distance is between the cantilever structure and optical sensor, a second distance is a height of the cantilever structure, and a third distance is between the optical sensor and the surface of the substrate. The optical sensor determines the first distance based on the light reflected from the cantilever structure, such that the third distance is determined from the first distance and the second distance.

    摘要翻译: 本公开描述了一种在带电粒子光刻系统中对衬底进行调平的装置。 在一个示例中,该装置包括基于悬臂的传感器,其包括光学传感器和悬臂结构。 光学传感器基于从悬臂结构反射的光确定光学传感器与基板的表面之间的距离。 在一个示例中,第一距离在悬臂结构和光学传感器之间,第二距离是悬臂结构的高度,第三距离在光学传感器和基板的表面之间。 光学传感器基于从悬臂结构反射的光确定第一距离,使得从第一距离和第二距离确定第三距离。