Thin film transistor having N-type and P-type CIS thin films and method of manufacturing the same
    1.
    发明授权
    Thin film transistor having N-type and P-type CIS thin films and method of manufacturing the same 有权
    具有N型和P型CIS薄膜的薄膜晶体管及其制造方法

    公开(公告)号:US07851791B2

    公开(公告)日:2010-12-14

    申请号:US12027929

    申请日:2008-02-07

    IPC分类号: H01L29/267

    CPC分类号: H01L29/78681 H01L29/24

    摘要: Provided is a thin film transistor (TFT) which uses CIS (CuInSe2), including Se, which is a chalcogen-based material, and can provide a rectifying function, and electric and optical switching functions of a diode. The TFT according to the present invention includes, a substrate, a gate electrode formed on a portion of the substrate, an insulating layer covering the substrate and a gate electrode, a plurality of CIS (CuInSe2) films formed on the insulating layer so as to cover the region where the gate electrode is formed; and source/drain regions separated from each other so as to comprise a trench exposing a portion of a surface of the CIS films.

    摘要翻译: 提供了使用CIS(CuInSe2)的薄膜晶体管(TFT),其包括作为硫属元素材料的Se,并且可以提供二极管的电和光开关功能。 根据本发明的TFT包括:基板,形成在基板的一部分上的栅电极,覆盖基板的绝缘层和栅极电极,形成在绝缘层上的多个CIS(CuInSe 2)膜,以便 覆盖形成栅电极的区域; 和源极/漏极区域彼此分离,以便包括暴露CIS膜表面的一部分的沟槽。

    THIN FILM TRANSISTOR HAVING N-TYPE AND P-TYPE CIS THIN FILMS AND METHOD OF MANUFACTURING THE SAME
    2.
    发明申请
    THIN FILM TRANSISTOR HAVING N-TYPE AND P-TYPE CIS THIN FILMS AND METHOD OF MANUFACTURING THE SAME 有权
    具有N型和P型CIS薄膜的薄膜晶体管及其制造方法

    公开(公告)号:US20080217610A1

    公开(公告)日:2008-09-11

    申请号:US12027929

    申请日:2008-02-07

    IPC分类号: H01L29/267 H01L21/06

    CPC分类号: H01L29/78681 H01L29/24

    摘要: Provided is a thin film transistor (TFT) which uses CIS (CuInSe2), including Se, which is a chalcogen-based material, and can provide a rectifying function, and electric and optical switching functions of a diode. The TFT according to the present invention includes, a substrate, a gate electrode formed on a portion of the substrate, an insulating layer covering the substrate and a gate electrode, a plurality of CIS (CuInSe2) films formed on the insulating layer so as to cover the region where the gate electrode is formed; and source/drain regions separated from each other so as to comprise a trench exposing a portion of a surface of the CIS films.

    摘要翻译: 提供了使用包括作为硫属元素系材料的Se的CIS(CuInSe 2 N 2)的薄膜晶体管(TFT),并且可以提供整流功能,以及提供整流功能的电和光开关功能 二极管。 根据本发明的TFT包括:衬底,形成在衬底的一部分上的栅电极,覆盖衬底的绝缘层和栅电极,多个CIS(CuInSe 2/2)膜 形成在绝缘层上以覆盖形成栅电极的区域; 和源极/漏极区域彼此分离,以便包括暴露CIS膜表面的一部分的沟槽。

    Method of fabricating a superconducting junction using cubic YBa.sub.2
Cu.sub.3 O .sub.x thin film as a barrier layer
    3.
    发明授权
    Method of fabricating a superconducting junction using cubic YBa.sub.2 Cu.sub.3 O .sub.x thin film as a barrier layer 失效
    使用立方YBa2Cu3O x薄膜作为阻挡层制造超导结的方法

    公开(公告)号:US6004907A

    公开(公告)日:1999-12-21

    申请号:US119394

    申请日:1998-07-21

    IPC分类号: H01L39/22 H01L39/24

    CPC分类号: H01L39/2496 Y10S505/702

    摘要: The present invention forms a superconducting junction using a cubic YBa.sub.2 Cu.sub.3 Ox thin film as a barrier layer. The present invention forms a first YBCO superconducting thin film, a SrTiO.sub.3 insulating layer thin film on the substrate, etches a side of them in the form of inclination, subsequently integrates a non-superconducting cubic YBCO barrier thin film, a second YBCO superconducting thin film, a SrTiO.sub.3 protecting layer thin film in series on the whole surface of the substrate, etches an opposite side of the etched part of the SrTiO.sub.3 insulating layer thin film in the form of inclination, fabricates a superconducting junction by forming a metal electrode to said aperture after forming apertures which expose said first YBCO superconducting thin film, the second YBCO superconducting thin film, fabricates a superconducting junction upon forming the metallic electrode to the apertures, and deposits a cubic YBa.sub.2 Cu.sub.3 Ox barrier thin film at a temperature of 600-650.degree. C. and a depositing velocity of 6.5-12.2 nm/s.

    摘要翻译: 本发明使用立方YBa2Cu3Ox薄膜作为阻挡层形成超导结。 本发明在衬底上形成第一YBCO超导薄膜,SrTiO3绝缘层薄膜,以斜面的形式蚀刻它们的一面,随后将非超导立方YBCO阻挡薄膜,第二YBCO超导薄膜 ,在基板的整个表面上串联的SrTiO3保护层薄膜,以倾斜的形式蚀刻SrTiO 3绝缘层薄膜的蚀刻部分的相对侧,通过在所述孔径上形成金属电极来制造超导结 在形成暴露所述第一YBCO超导薄膜的孔之后,第二YBCO超导薄膜在向孔隙形成金属电极时制造超导结,并在600-650℃的温度下沉积立方YBa2Cu3Ox势垒薄膜。 并且沉积速度为6.5-12.2nm / s。

    Method of fabricating CIS or CIGS thin film
    4.
    发明授权
    Method of fabricating CIS or CIGS thin film 失效
    制造CIS或CIGS薄膜的方法

    公开(公告)号:US08647394B2

    公开(公告)日:2014-02-11

    申请号:US13070099

    申请日:2011-03-23

    IPC分类号: C01D3/00

    摘要: Disclosed herein is a method of fabricating a CIS or CIGS thin film, comprising: forming, on a substrate, a seed particle layer comprising copper-indium-compound seed particles comprising copper (Cu); indium (In); and at least one selected from the group consisting of gallium (Ga), sulfur (S) and selenium (Se), applying, on the seed particle layer, a water-soluble precursor solution comprising: a water-soluble copper (Cu) precursor; a water-soluble indium (In) precursor; and at least one selected from the group consisting of a water-soluble gallium (Ga) precursor, a water-soluble sulfur (S) precursor and a water-soluble selenium (Se) precursor, and forming a thin film at high temperature.

    摘要翻译: 本文公开了一种制造CIS或CIGS薄膜的方法,包括:在基底上形成包含铜(Cu)的铜 - 铟 - 复合种子颗粒的种子颗粒层; 铟(In); 和选自镓(Ga),硫(S)和硒(Se)的至少一种,在种子颗粒层上施加水溶性前体溶液,其包含水溶性铜(Cu)前体 ; 水溶性铟(In)前体; 和选自水溶性镓(Ga)前体,水溶性硫(S)前体和水溶性硒(Se)前体)中的至少一种,并在高温下形成薄膜。

    THIN FILM TRANSISTOR HAVING N-TYPE AND P-TYPE CIS THIN FILMS AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    THIN FILM TRANSISTOR HAVING N-TYPE AND P-TYPE CIS THIN FILMS AND METHOD OF MANUFACTURING THE SAME 失效
    具有N型和P型CIS薄膜的薄膜晶体管及其制造方法

    公开(公告)号:US20110045633A1

    公开(公告)日:2011-02-24

    申请号:US12938833

    申请日:2010-11-03

    IPC分类号: H01L21/06

    CPC分类号: H01L29/78681 H01L29/24

    摘要: Provided is a thin film transistor (TFT) which uses CIS (CuInSe2), including Se, which is a chalcogen-based material, and can provide a rectifying function, and electric and optical switching functions of a diode. The TFT according to the present invention includes, a substrate, a gate electrode formed on a portion of the substrate, an insulating layer covering the substrate and a gate electrode, a plurality of CIS (CuInSe2) films formed on the insulating layer so as to cover the region where the gate electrode is formed; and source/drain regions separated from each other so as to comprise a trench exposing a portion of a surface of the CIS films.

    摘要翻译: 提供了使用CIS(CuInSe2)的薄膜晶体管(TFT),其包括作为硫属元素材料的Se,并且可以提供二极管的电和光开关功能。 根据本发明的TFT包括:基板,形成在基板的一部分上的栅电极,覆盖基板的绝缘层和栅极电极,形成在绝缘层上的多个CIS(CuInSe 2)膜,以便 覆盖形成栅电极的区域; 和源极/漏极区域彼此分离,以便包括暴露CIS膜表面的一部分的沟槽。

    Method of manufacturing a super conduction field effect transistor
    7.
    发明授权
    Method of manufacturing a super conduction field effect transistor 失效
    制造超导电场效应晶体管的方法

    公开(公告)号:US5851843A

    公开(公告)日:1998-12-22

    申请号:US951503

    申请日:1997-10-16

    CPC分类号: H01L39/146 H01L21/32058

    摘要: A method of manufacturing super conduction field effect transistor having a bi-crystal boundary junction is disclosed. According to the present invention, it is constituted such that on a SrTiO.sub.3 bi-crystal substrate, a bi-crystal super conductive thin films for source and drain electrode having a compound of YBa.sub.2 Cu.sub.3 O.sub.7-x, a non-super conductive oxide layer having a compound of PrBa.sub.2 Cu.sub.3 O.sub.7-x interposed between the bi-crystal super conductive thin films for source and drain electrode and the SrTiO.sub.3 bi-crystal substrate, a boundary channel interposed therebetween, a amorphous insulating layer for gate electrode having a compound of SrTiO.sub.3 deposited on a portion between the bi-crystal super conductive thin films for source and drain electrode above the boundary channel, metal pads for electrode, respectively, formed on the bi-crystal super conductive thin films for source and drain electrode and the amorphous insulating layer for gate electrode are sequentially formed.

    摘要翻译: 公开了一种制造具有双晶边界结的超导电场效应晶体管的方法。 根据本发明,其结构使得在SrTiO3双晶基板上具有具有YBa2Cu3O7-x的化合物的源极和漏极的双晶超导电薄膜,具有化合物的非超导导电氧化物层 PrBa2Cu3O7-x介于用于源极和漏极的双晶超导电薄膜和SrTiO3双晶衬底之间,边界通道介于其间,用于栅电极的非晶绝缘层,其中沉积有SrTiO 3的化合物沉积在 用于源极和漏极的双晶超级导电薄膜和用于栅电极的非晶绝缘层上分别形成的用于源极和漏电极的双晶超级导电薄膜,分别用于电极的金属焊盘,栅电极的非晶绝缘层 形成。

    Method for manufacturing a superconductor-insulator-superconductor
Josephson tunnel junction
    8.
    发明授权
    Method for manufacturing a superconductor-insulator-superconductor Josephson tunnel junction 失效
    制造超导体 - 绝缘体 - 超导体约瑟夫逊隧道结的方法

    公开(公告)号:US5750474A

    公开(公告)日:1998-05-12

    申请号:US708499

    申请日:1996-09-05

    IPC分类号: H01L39/22 H01L39/24

    摘要: A superconductor-insulator-superconductor Josephson tunnel junction, comprising: a single crystalline substrate having a perovskite crystal structure; a template layer formed of a b-axis oriented PBCO thin film on the substrate; and a trilayer structure consisting of a lower electrode, a barrier layer and an upper electrode, which serve as a superconductor, an insulator and a superconductor, respectively, the lower electrode and the upper electrode each being formed of an a-axis oriented YBCO superconducting thin film and having an oblique junction edge at an angle of 30.degree. to 70.degree., the barrier layer being formed of an insulating thin film between the two superconducting electrodes, can be operated at a low power with an exceptional speed in calculation and data processing.

    摘要翻译: 超导体 - 绝缘体 - 超导体约瑟夫逊隧道结,包括:具有钙钛矿晶体结构的单晶衬底; 在基板上由b轴取向的PBCO薄膜形成的模板层; 以及分别由用作超导体,绝缘体和超导体的下电极,阻挡层和上电极组成的三层结构,所述下电极和上电极各自由a轴取向的YBCO超导体 薄膜,并且在30°至70°的角度具有倾斜的接合边缘,阻挡层由两个超导电极之间的绝缘薄膜形成,可以在计算和数据处理中以非常高的速度以低功率运行 。

    Method for early diagnosis of alzheimer'S disease using phototransistor
    9.
    发明授权
    Method for early diagnosis of alzheimer'S disease using phototransistor 有权
    使用光电晶体管早期诊断阿尔茨海默氏病的方法

    公开(公告)号:US09023607B2

    公开(公告)日:2015-05-05

    申请号:US13093152

    申请日:2011-04-25

    IPC分类号: C12Q1/00 B82Y15/00 G01N33/68

    摘要: A method for diagnosing Alzheimer's disease by detecting the presence of beta-amyloid in cells using a phototransistor device. Cells that potentially contain beta-amyloid are provided and labeled with a multi-protein that selectively binds to beta-amyloid if present and that includes streptavidin, biotin and polyethylene glycol connected in sequence with the streptavidin being bound to a magnetic bead and the polyethylene glycol being bound to the beta-amyloid, to provide labeled cells. A phototransistor device including a channel layer is provided and a difference in photocurrent determined corresponding to incident light measured before and after selectively fixing the labeled cells on a surface of the channel layer by applying an external magnetic field effective to attract the magnetic bead to the phototransistor device through a permanent magnet positioned below the channel. Any difference between the first and second photocurrents indicates the presence of, and optionally amount of, labeled beta-amyloid in the cells.

    摘要翻译: 一种通过使用光电晶体管装置检测细胞中β-淀粉样蛋白的存在来诊断阿尔茨海默病的方法。 提供可能含有β-淀粉样蛋白的细胞并用选择性结合β-淀粉样蛋白(如果存在)的多蛋白标记,并且包括与链霉抗生物素蛋白结合到磁珠上的序列连接的链霉抗生物素蛋白,生物素和聚乙二醇,并且聚乙二醇 结合β-淀粉样蛋白,以提供标记细胞。 提供了包括沟道层的光电晶体管装置,并且通过施加有效吸引磁珠到光电晶体管的外部磁场选择性地将标记的单元选择性地固定在通道层的表面之前和之后测量的入射光确定的光电流差异 设备通过位于通道下方的永磁体。 第一和第二光电流之间的任何差异表明在细胞中存在和任选量的标记的β-淀粉样蛋白。

    Thin film transistor having n-type and p-type CIS thin films and method of manufacturing the same
    10.
    发明授权
    Thin film transistor having n-type and p-type CIS thin films and method of manufacturing the same 失效
    具有n型和p型CIS薄膜的薄膜晶体管及其制造方法

    公开(公告)号:US08084295B2

    公开(公告)日:2011-12-27

    申请号:US12938833

    申请日:2010-11-03

    IPC分类号: H01L21/06

    CPC分类号: H01L29/78681 H01L29/24

    摘要: Provided is a thin film transistor (TFT) which uses CIS (CuInSe2), including Se, which is a chalcogen-based material, and can provide a rectifying function, and electric and optical switching functions of a diode. The TFT according to the present invention includes, a substrate, a gate electrode formed on a portion of the substrate, an insulating layer covering the substrate and a gate electrode, a plurality of CIS (CuInSe2) films formed on the insulating layer so as to cover the region where the gate electrode is formed; and source/drain regions separated from each other so as to comprise a trench exposing a portion of a surface of the CIS films.

    摘要翻译: 提供了使用CIS(CuInSe2)的薄膜晶体管(TFT),其包括作为硫属元素材料的Se,并且可以提供二极管的电和光开关功能。 根据本发明的TFT包括:基板,形成在基板的一部分上的栅电极,覆盖基板的绝缘层和栅极电极,形成在绝缘层上的多个CIS(CuInSe 2)膜,以便 覆盖形成栅电极的区域; 和源极/漏极区域彼此分离,以便包括暴露CIS膜表面的一部分的沟槽。