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公开(公告)号:US6049136A
公开(公告)日:2000-04-11
申请号:US89684
申请日:1998-06-03
申请人: Guy H. Humphrey , Rory L. Fisher , Jerry D'Amato
发明人: Guy H. Humphrey , Rory L. Fisher , Jerry D'Amato
IPC分类号: H01L23/12 , H01L21/60 , H01L21/822 , H01L23/485 , H01L23/50 , H01L23/66 , H01L27/04 , H01L23/48 , H01L23/52
CPC分类号: H01L24/02 , H01L23/50 , H01L23/66 , H01L2224/0401 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19043
摘要: The present invention is generally directed to a an integrated circuit package having a unique lead configuration, wherein the integrated circuit package is constructed from a die containing an integrated circuit. The die has a plurality of leads for carrying electrical signals to and from the integrated circuit, wherein the plurality of leads are disposed over a bottom side of the die. The package further includes a multi-layer substrate having at least two signal layers. The substrate is juxtaposed against the die and has a plurality of contacts disposed along a top side to align with the leads of the die to carry the electrical signals to conductive paths within the at least two signal layers. The multi-layer substrate has a larger adjoining surface area than the die and further has a plurality of leads disposed across a bottom side for connection with a printed circuit board, the on the bottom side being in communication with the leads of the top side by way of the conductive paths disposed within the substrate. The leads of the die are disposed such that at least two high speed rows of leads are disposed in parallel fashion near the center of the die, wherein the high speed rows are for carrying high frequency electrical signals. At least two sets of low speed rows of leads are disposed in parallel fashion near the sides of the die, and spaced apart from the high speed rows.
摘要翻译: 本发明一般涉及一种具有独特引线结构的集成电路封装,其中该集成电路封装由包含集成电路的管芯构成。 芯片具有多个用于将电信号传送到集成电路的引线,其中多个引线设置在模具的底侧之上。 该封装还包括具有至少两个信号层的多层基板。 衬底与裸片并置并且具有沿着顶侧布置的多个触点,以与芯片的引线对准以将电信号传送到至少两个信号层内的导电路径。 多层基板具有比模具更大的邻接表面积,并且还具有跨越底侧设置用于与印刷电路板连接的多个引线,底部侧与顶侧的引线连通, 设置在基板内的导电路径的方式。 芯片的引线被设置成使得至少两个高速行的引线以平行的方式设置在芯片的中心附近,其中高速行用于承载高频电信号。 至少两组低速行的引线以平行方式设置在模具的侧面附近并且与高速行间隔开。