Method of maintaining signal integrity across a capacitive coupled solder bump
    2.
    发明授权
    Method of maintaining signal integrity across a capacitive coupled solder bump 失效
    维持电容耦合焊料凸块的信号完整性的方法

    公开(公告)号:US07319341B1

    公开(公告)日:2008-01-15

    申请号:US10653045

    申请日:2003-08-28

    IPC分类号: G01R31/26

    CPC分类号: G01R1/06794

    摘要: The present invention is a novel method and computer program product which utilizes an interface capacitor formed by the metal of the probe tip, a dielectric layer, such as an oxide, formed by a contaminant on a solder bump and the metal of the solder bump. The interface capacitor forms a capacitive divider with the inherent capacitances of the automatic test equipment and the device under test (DUT). The voltage characteristics of the capacitive divider are used to drive voltage signals across the interface capacitor to test the DUT. In either direction (i.e. from the automatic test equipment to the DUT or vice versa), by altering the voltage output high amplitude of the driver and/or the voltage input high amplitude of the load, the DUT is validly tested through the interface capacitor. Thus, even if all I/O bumps have an oxide layer, the device may still be validly tested.

    摘要翻译: 本发明是一种新颖的方法和计算机程序产品,其利用由探针尖端的金属形成的界面电容器,由焊料凸块上的污染物和焊料凸块的金属形成的诸如氧化物的电介质层。 接口电容器形成具有自动测试设备和被测器件(DUT)固有电容的电容分压器。 电容分压器的电压特性用于驱动跨接口电容器的电压信号来测试DUT。 在任一方向(即从自动测试设备到DUT或反之亦然),通过改变驱动器的电压输出高幅度和/或负载的电压输入高幅度,通过接口电容器有效地测试DUT。 因此,即使所有I / O凸块都具有氧化物层,该器件仍然可以被有效地测试。