公开(公告)号：US20050151172A1

公开(公告)日：2005-07-14

申请号：US10490599

申请日：2002-10-02

申请人： Hisashi Takemura ,  Risho Koh ,  Yukishige Saito ,  Jyonu Ri

发明人： Hisashi Takemura ,  Risho Koh ,  Yukishige Saito ,  Jyonu Ri

IPC分类号： H01L21/265 ,  H01L21/336 ,  H01L29/786 ,  H01L29/76

CPC分类号： H01L29/78696 ,  H01L21/26586 ,  H01L29/66772 ,  H01L29/78612 ,  H01L29/78621 ,  H01L2029/7863

摘要： A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate electrode formed on the semiconductor layer through the second insulating layer. The semiconductor layer includes a low concentration region formed under the gate electrode through the second insulating layer, two high concentration regions which are formed in at least upper regions on outer sides of the low concentration region under the gate electrode through the second insulating layer, and have an impurity concentration higher than an impurity concentration of the low concentration region, respectively, and two source/drain regions which are formed in side portions of the high concentration regions to have low concentration region side end portions, respectively. A width of the high concentration region is equal to or less than 30 nm.

摘要翻译： 半导体器件包括第一绝缘层，形成在第一绝缘层上的半导体层，半导体层的一部分上的第二绝缘层和通过第二绝缘层形成在半导体层上的栅电极。 半导体层包括通过第二绝缘层形成在栅电极下方的低浓度区域，通过第二绝缘层形成在栅电极下方的低浓度区域的至少上侧区域中的至少上部区域的两个高浓度区域，以及 分别具有高于低浓度区域的杂质浓度的杂质浓度，以及分别形成在高浓度区域的侧部的两个源极/漏极区域，以分别具有低浓度区域侧端部。 高浓度区域的宽度等于或小于30nm。

公开(公告)号：US07485923B2

公开(公告)日：2009-02-03

申请号：US10490599

申请日：2002-10-02

申请人： Hisashi Takemura ,  Risho Koh ,  Yukishige Saito ,  Jyonu Ri

发明人： Hisashi Takemura ,  Risho Koh ,  Yukishige Saito ,  Jyonu Ri

IPC分类号： H01L29/772

CPC分类号： H01L29/78696 ,  H01L21/26586 ,  H01L29/66772 ,  H01L29/78612 ,  H01L29/78621 ,  H01L2029/7863

摘要： A semiconductor device includes a first insulating layer, a semiconductor layer formed on the first insulating layer, a second insulating layer on a part of the semiconductor layer, and a gate electrode formed on the semiconductor layer through the second insulating layer. The semiconductor layer includes a low concentration region formed under the gate electrode through the second insulating layer, two high concentration regions which are formed in at least upper regions on outer sides of the low concentration region under the gate electrode through the second insulating layer, and have an impurity concentration higher than an impurity concentration of the low concentration region, respectively, and two source/drain regions which are formed in side portions of the high concentration regions to have low concentration region side end portions, respectively. A width of the high concentration region is equal to or less than 30 nm.

摘要翻译： 半导体器件包括第一绝缘层，形成在第一绝缘层上的半导体层，半导体层的一部分上的第二绝缘层和通过第二绝缘层形成在半导体层上的栅电极。 半导体层包括通过第二绝缘层形成在栅电极下方的低浓度区域，通过第二绝缘层形成在栅电极下方的低浓度区域的至少上侧区域中的至少上部区域的两个高浓度区域，以及 分别具有高于低浓度区域的杂质浓度的杂质浓度，以及分别形成在高浓度区域的侧部的两个源极/漏极区域，以分别具有低浓度区域侧端部。 高浓度区域的宽度等于或小于30nm。

公开(公告)号：US07211517B2

公开(公告)日：2007-05-01

申请号：US10476978

申请日：2002-09-05

申请人： Yukishige Saito ,  Risho Koh ,  Jyonu Ri ,  Hisashi Takemura

发明人： Yukishige Saito ,  Risho Koh ,  Jyonu Ri ,  Hisashi Takemura

IPC分类号： H01L21/311

CPC分类号： H01L29/66757 ,  H01L21/76264 ,  H01L21/76283 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/78609 ,  H01L29/78618 ,  H01L29/78636 ,  Y10S438/978

摘要： A method of manufacturing a semiconductor device of the present invention includes (a) sequentially forming a gate insulating film 14, a first conductive layer 15 and a first insulating film 16 on a semiconductor layer 13 provided on an insulating film 12; (b) selectively removing the semiconductor layer, the gate insulating film, the first conductive layer and the first insulating film to form a device isolation trench; (c) forming a second insulating film 17 in the device isolation [element separation] trench, wherein a height of an upper surface of the second insulating film is substantially coincident with that of an upper surface of the first insulating film; (d) removing a part of the second insulating film and the first insulating film such that a height of an upper surface of the exposed first conductive layer is substantially coincident with that of the top surface of the second insulating film; and (e) patterning the first conductive layer to form a gate electrode.

摘要翻译： 本发明的半导体器件的制造方法包括：（a）在设置在绝缘膜12上的半导体层13上依次形成栅极绝缘膜14，第一导电层15和第一绝缘膜16; （b）选择性地去除半导体层，栅极绝缘膜，第一导电层和第一绝缘膜，以形成器件隔离沟槽; （c）在器件隔离[元件分离]沟槽中形成第二绝缘膜17，其中第二绝缘膜的上表面的高度与第一绝缘膜的上表面的高度基本一致; （d）去除第二绝缘膜和第一绝缘膜的一部分，使得暴露的第一导电层的上表面的高度与第二绝缘膜的顶表面的高度基本一致; 和（e）图案化第一导电层以形成栅电极。