公开(公告)号：US09287311B2

公开(公告)日：2016-03-15

申请号：US13587317

申请日：2012-08-16

申请人： Kan Shimizu ,  Keishi Inoue

发明人： Kan Shimizu ,  Keishi Inoue

IPC分类号： H01L27/14 ,  H01L27/146 ,  H01L23/48 ,  H01L21/44

CPC分类号： H01L27/14636 ,  H01L21/76898 ,  H01L2224/9202 ,  H01L2224/94 ,  H01L2924/13091 ,  H01L2224/83 ,  H01L2924/00

摘要： It is possible to reduce resistance variations of a member connecting a through-silicon via to a line and improve wiring reliability. A hole through which the through-silicon via is to be stretched is created and an over-etching process is carried out on a wiring layer including the line. Then, by embedding copper in the hole, the through-silicon via made of the copper can be created. After the through-silicon via has been connected to the line made of aluminum through the member which is a connection area, the connection area is alloyed in a thermal treatment in order to electrically connect the through-silicon via to the line. Thus, it is possible to reduce variations of a resistance between the through-silicon via and the line and also improve wiring reliability as well. The present technology can be applied to a semiconductor device and a method for manufacturing the semiconductor device.

摘要翻译： 可以降低连接通孔的元件与线的电阻变化，提高布线的可靠性。 产生贯通硅通孔穿过的孔，并对包括该线的布线层进行过蚀刻处理。 然后，通过将铜嵌入孔中，可以形成由铜制成的贯通硅通孔。 在通过作为连接区域的构件将通硅通孔连接到由铝制成的线之后，在热处理中合金化连接区域，以将通硅通孔电连接到线路。 因此，可以减小贯通硅通孔和线路之间的电阻的变化，并且还提高布线可靠性。 本技术可以应用于半导体器件和半导体器件的制造方法。

公开(公告)号：US07944255B2

公开(公告)日：2011-05-17

申请号：US12563575

申请日：2009-09-21

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： H03L7/00

CPC分类号： G05F3/262 ,  G05F3/24

摘要： A CMOS bias circuit includes a starter circuits and a started circuit part which supplies a current to the outside. The starter circuits has a connection node (first terminal) between it and the started circuit part. The starter circuits includes a first MOS transistor connected at its drain to the first terminal, a first current supply circuit which supplies a starter current to the started circuit via the first MOS transistor, and a circuit which supplies a second current in a direction that interrupts a current flowing through the first MOS transistor to a node between the first MOS transistor and the first current supply circuit in accordance with a potential at the first terminal. The starter circuits has a function of preventing a current flowing between the drain and source of the first MOS transistor in the opposite direction by increasing or decreasing a gate bias of the first MOS transistor in accordance with a value of the second current.

摘要翻译： CMOS偏置电路包括起动电路和向外部供电的起动电路部。 起动器电路在其与启动电路部分之间具有连接节点（第一端子）。 起动器电路包括在其漏极连接到第一端子的第一MOS晶体管，经由第一MOS晶体管向启动电路提供启动电流的第一电流供应电路，以及沿着中断的方向提供第二电流的电路 根据第一端子处的电位，流过第一MOS晶体管的电流到第一MOS晶体管和第一电流供应电路之间的节点。 起动电路具有通过根据第二电流的值增加或减小第一MOS晶体管的栅极偏压来防止在相反方向在第一MOS晶体管的漏极和源极之间流动的电流的功能。

公开(公告)号：US20070001656A1

公开(公告)日：2007-01-04

申请号：US11481335

申请日：2006-07-03

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： G05F1/00

CPC分类号： G05F1/575

摘要： A resistor element is inserted between an output terminal of an output transistor and an output terminal of a regulator circuit. A signal, which is taken out of a connection node between the output terminal of the output transistor and the resistor element, is used for phase compensation. Thereby, oscillation is prevented from being caused by a phase delay due to a capacitive load which is connected to the output of the regulator circuit.

摘要翻译： 电阻元件插入在输出晶体管的输出端子和调节器电路的输出端子之间。 从输出晶体管的输出端子和电阻元件之间的连接节点取出的信号用于相位补偿。 由此，防止由连接到调节器电路的输出的电容性负载引起的相位延迟引起的振荡。

公开(公告)号：US06388651B1

公开(公告)日：2002-05-14

申请号：US08733702

申请日：1996-10-17

申请人： Kohei Kinoshita ,  Kan Shimizu

发明人： Kohei Kinoshita ,  Kan Shimizu

IPC分类号： G09G336

CPC分类号： G02B6/0083 ,  G02B6/0043 ,  G02B6/0088 ,  G09G3/3666 ,  G09G3/3688 ,  G09G2300/0408 ,  G09G2310/0281 ,  G09G2330/021 ,  G09G2370/08

摘要： A picture control device is used for driving a flat-panel display having a plurality of horizontal pixel lines each formed of display pixels arranged in one line, and composed of first and second driver groups which are arranged to divide the display pixels into groups and drive the groups of display pixels, respectively, and a drive circuit board for controlling the driver groups to output pixel data assigned to the respective display pixels during a scanning period for each horizontal pixel line and to drive the display pixels according to the pixel data. In particular, the drive circuit board includes a gate-array control section connected to the first and second driver groups by first and second wiring lines electrically separated from each other, for distributing pixel data assigned to the display pixels of each group to a corresponding driving group via a corresponding wiring line.

摘要翻译： 图像控制装置用于驱动具有多个水平像素线的平板显示器，每个水平像素线由排列成一行的显示像素形成，并且包括第一和第二驱动器组，其被布置成将显示像素分成组并驱动 显示像素组以及用于控制驱动器组以在每个水平像素线的扫描周期期间分配给各个显示像素的像素数据并根据像素数据驱动显示像素的驱动电路板。 具体而言，驱动电路基板包括通过彼此电分离的第一和第二布线连接到第一和第二驱动器组的栅极阵列控制部分，用于将分配给每个组的显示像素的像素数据分配给相应的驱动 组通过相应的接线。

公开(公告)号：US06259425B1

公开(公告)日：2001-07-10

申请号：US09063384

申请日：1998-04-21

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： G09G336

CPC分类号： G09G5/006 ,  G09G3/20 ,  G09G3/3607 ,  G09G3/3648 ,  G09G2310/0275 ,  G09G2320/0223 ,  G09G2320/0285

摘要： A matrix type display apparatus includes a video signal voltage compensation circuit for suppressing distortion of a video signal produced on a video signal transmission bus mainly by the wiring resistance and a parasitic capacitance. The video signal voltage compensation circuit is connected to the input end of the video signal transmission bus to compensate waveform distortion of a video signal occurring on the video signal transmission bus while it is supplied to sample-hold circuits connected to the bus. The compensation circuit also includes a filter whose correction coefficient is varied in response to elapsed time from reception of a horizontal synchronizing signal.

摘要翻译： 矩阵式显示装置包括：视频信号电压补偿电路，用于抑制视频信号传输总线上产生的视频信号的失真，主要由布线电阻和寄生电容产生。 视频信号电压补偿电路连接到视频信号传输总线的输入端，以补偿当视频信号传输总线被提供给连接到总线的采样保持电路时出现在视频信号传输总线上的视频信号的波形失真。 补偿电路还包括滤波器，其校正系数响应于从水平同步信号的接收所经过的时间而变化。

公开(公告)号：US06812875B2

公开(公告)日：2004-11-02

申请号：US10254909

申请日：2002-09-26

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： H03M300

CPC分类号： H03M3/022

摘要： A method for controlling an analog/digital converter circuitry includes generating a digital signal by accumulating a predetermined increment at a predetermined time interval in accordance with a value of a first analog signal input to the analog/digital converter. The digital signal is converted to a second analog signal, the second analog signal is subtracted from the first analog signal, and a detection signal is generated in accordance with a subtraction result. An accumulation mode is selected from accumulation modes in accordance with the detection signal and accumulation is performed at the time interval and in the increment in accordance with the selected accumulation mode.

摘要翻译： 一种用于控制模拟/数字转换器电路的方法包括：根据输入到模拟/数字转换器的第一模拟信号的值，以预定的时间间隔累积预定的增量来产生数字信号。 数字信号被转换为第二模拟信号，从第一模拟信号中减去第二模拟信号，并且根据减法结果生成检测信号。 根据检测信号从累积模式中选择累积模式，并且根据所选择的累加模式在时间间隔和增量中执行累加。

公开(公告)号：US5801674A

公开(公告)日：1998-09-01

申请号：US534590

申请日：1995-09-27

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： G02F1/133 ,  G09G3/36 ,  H04N5/66

CPC分类号： G09G3/3611 ,  G09G3/3685 ,  G09G2370/08

摘要： In a driving system of so-called enable chain system for dividing signal electrodes of a liquid crystal display device into a plurality of signal electrode groups and driving the respective signal electrode groups by drivers formed in an IC form, a data register in the driver includes a control circuit for creating an internal start signal for controlling the timing at which the display data fetching operation is started in synchronism with a clock signal.

摘要翻译： 在用于将液晶显示装置的信号电极分割为多个信号电极组并通过形成为IC形式的驱动器驱动各个信号电极组的所谓的使能链系统的驱动系统中，驱动器中的数据寄存器包括 用于创建用于控制与时钟信号同步地开始显示数据取出操作的定时的内部起始信号的控制电路。

公开(公告)号：US07355469B2

公开(公告)日：2008-04-08

申请号：US11481335

申请日：2006-07-03

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： G05F1/10

CPC分类号： G05F1/575

摘要： A resistor element is inserted between an output terminal of an output transistor and an output terminal of a regulator circuit. A signal, which is taken out of a connection node between the output terminal of the output transistor and the resistor element, is used for phase compensation. Thereby, oscillation is prevented from being caused by a phase delay due to a capacitive load which is connected to the output of the regulator circuit.

摘要翻译： 电阻元件插入在输出晶体管的输出端子和调节器电路的输出端子之间。 从输出晶体管的输出端子和电阻元件之间的连接节点取出的信号用于相位补偿。 由此，防止由连接到调节器电路的输出的电容性负载引起的相位延迟引起的振荡。

公开(公告)号：US06211849B1

公开(公告)日：2001-04-03

申请号：US08936515

申请日：1997-09-24

申请人： Takeshi Sasaki ,  Kan Shimizu

发明人： Takeshi Sasaki ,  Kan Shimizu

IPC分类号： G09G320

CPC分类号： G09G3/20 ,  G09G3/3611 ,  G09G3/3688 ,  G09G2300/0426 ,  G09G2310/027 ,  G09G2310/0281 ,  G09G2310/08 ,  G09G2330/028 ,  G09G2370/08

摘要： A liquid crystal display device is composed of a liquid crystal panel having a matrix array of liquid crystal pixels, a plurality of scanning lines formed along rows of the liquid crystal pixels, and a plurality of signal lines formed along columns of the liquid crystal pixels, and a display control circuit for selecting a row of the liquid crystal pixels via each of the scanning lines and controlling voltages across the liquid crystal pixels of the selected row via the signal lines. The display control circuit includes a signal line driver for sequentially driving the signal lines, and the signal line driver includes a plurality of driver ICs which are connected in cascade by inter-module wirings for transmitting a clock signal and a pixel data signal and each of which sequentially supplies the pixel data signal to a predetermined number of signal lines in synchronism with the clock signal. Particularly, in the liquid crystal display device, each driver IC has a clock waveform shaping circuit for performing a clock signal waveform shaping by regulating a duty ratio of the clock signal to be output together with the pixel data signal to the next driver IC.

摘要翻译： 液晶显示装置由具有液晶像素的矩阵阵列的液晶面板，沿着液晶像素的行形成的多条扫描线以及沿液晶像素的列形成的多条信号线构成， 以及显示控制电路，用于经由每条扫描线选择一行液晶像素，并且经由信号线控制所选行的液晶像素两端的电压。 显示控制电路包括用于顺序驱动信号线的信号线驱动器，并且信号线驱动器包括多个驱动器IC，它们通过用于发送时钟信号和像素数据信号的模块间布线串联连接， 其与时​​钟信号同步地将像素数据信号顺序地提供给预定数量的信号线。 特别地，在液晶显示装置中，每个驱动器IC具有时钟波形整形电路，用于通过将与像素数据信号一起输出的时钟信号的占空比调节到下一个驱动器IC来执行时钟信号波形整形。

公开(公告)号：US20100231289A1

公开(公告)日：2010-09-16

申请号：US12563575

申请日：2009-09-21

申请人： Kan Shimizu

发明人： Kan Shimizu

IPC分类号： G05F3/02

CPC分类号： G05F3/262 ,  G05F3/24

摘要： A CMOS bias circuit includes a starter circuits and a started circuit part which supplies a current to the outside. The starter circuits has a connection node (first terminal) between it and the started circuit part. The starter circuits includes a first MOS transistor connected at its drain to the first terminal, a first current supply circuit which supplies a starter current to the started circuit via the first MOS transistor, and a circuit which supplies a second current in a direction that interrupts a current flowing through the first MOS transistor to a node between the first MOS transistor and the first current supply circuit in accordance with a potential at the first terminal. The starter circuits has a function of preventing a current flowing between the drain and source of the first MOS transistor in the opposite direction by increasing or decreasing a gate bias of the first MOS transistor in accordance with a value of the second current.

摘要翻译： CMOS偏置电路包括起动电路和向外部供电的起动电路部。 起动器电路在其与启动电路部分之间具有连接节点（第一端子）。 起动器电路包括在其漏极连接到第一端子的第一MOS晶体管，经由第一MOS晶体管向启动电路提供启动电流的第一电流供应电路，以及沿着中断的方向提供第二电流的电路 根据第一端子处的电位，流过第一MOS晶体管的电流到第一MOS晶体管和第一电流供应电路之间的节点。 起动电路具有通过根据第二电流的值增加或减小第一MOS晶体管的栅极偏压来防止在相反方向在第一MOS晶体管的漏极和源极之间流动的电流的功能。