公开(公告)号：US4947020A

公开(公告)日：1990-08-07

申请号：US298131

申请日：1989-01-18

申请人： Kaoru Imamura ,  Wataru Takahashi

发明人： Kaoru Imamura ,  Wataru Takahashi

IPC分类号： H01C17/22 ,  H01C17/26 ,  H01L21/82 ,  H01L23/525 ,  H01L27/01

CPC分类号： H01L23/5252 ,  H01L23/5254 ,  H01L2924/0002

摘要： A trimming element comprises (a) a medium layer, (b) a pair of electrodes connected to the medium layer, and (c) an alloy layer, which is formed of metal of the electrodes and material of the medium layer and is created in the medium layer, for substantially short-circuiting the electrodes to each other. The alloy layer is obtained by applying a laser beam to the medium layer to heat a portion between the electrodes. The metal layer for substantially short-circuiting the electrodes is thus formed.

公开(公告)号：US20100248221A1

公开(公告)日：2010-09-30

申请号：US12223928

申请日：2007-11-13

申请人： Hisanori Nasu ,  Atsumi Tsujimoto ,  Kaoru Imamura ,  Takanori Kobayashi ,  Takashi Gojoubori

发明人： Hisanori Nasu ,  Atsumi Tsujimoto ,  Kaoru Imamura ,  Takanori Kobayashi ,  Takashi Gojoubori

IPC分类号： C12Q1/68

CPC分类号： C12Q1/68 ,  C12Q2563/185

摘要： The object is to provide a novel organism identification method which can be used as an alternative method to a conventional organism identification method which utilizes DNA and requires enormous labor. Developed is an organism identification method for determining whether or not an organism of interest is identical to a specific organism or a progeny thereof, which is characterized by introducing a DNA tag(s) in advance into a cell(s) of the specific organism, or a parasite or a symbiont with the specific organism, and determining whether or not the organism of interest is identical to the specific organism or a progenitor thereof based on the detection or non-detection of the DNA tag in DNA extracted from the organism of interest, or the parasite or the symbiont with the organism of interest.

摘要翻译： 目的是提供一种新型的生物体鉴定方法，其可以用作利用DNA并需要巨大劳动的常规生物体鉴定方法的替代方法。 开发的是用于确定感兴趣的生物体是否与特定生物体或其后代相同的生物体鉴定方法，其特征在于将DNA标签预先引入特定生物体的细胞中， 或具有特定生物体的寄生虫或共生体，并且基于从感兴趣的生物体中提取的DNA中DNA标签的检测或不检测来确定感兴趣的生物体是否与特定生物体或其祖细胞相同 ，或与感兴趣的生物体的寄生虫或共生体。

公开(公告)号：US5068704A

公开(公告)日：1991-11-26

申请号：US520446

申请日：1990-05-08

申请人： Akio Nakagawa ,  Kaoru Imamura ,  Ryo Sato ,  Tadahide Hoshi

发明人： Akio Nakagawa ,  Kaoru Imamura ,  Ryo Sato ,  Tadahide Hoshi

IPC分类号： H01L29/68 ,  H01L21/02 ,  H01L21/18 ,  H01L21/22 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/187 ,  H01L21/2205 ,  Y10S148/012 ,  Y10S148/157

摘要： A method of manufacturing a semiconductor device comprising the steps of bringing a mirror-polished surface of a first semiconductor substrate of a first conductivity type into contact with a mirror-polished surface of a second semiconductor substrate of a second conductivity type having an impurity concentration which is lower than that of said first conductivity type, in a clean atmosphere, and thermally heating said first and second semiconductor substrates so that they unite. Impurity is diffused from said first semiconductor substrate into said second semiconductor substrate, thereby forming a diffusion layer of a first conductivity type in said second semiconductor substrate. A total amount of impurity of said diffusion layer is 1.times.10.sup.13 /cm.sup.2 to 2.times.10.sup.15 /cm.sup.2, to form a pn junction in said second semiconductor substrate.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：将具有第一导电类型的第一半导体衬底的镜面抛光表面与具有杂质浓度的第二导电类型的第二半导体衬底的镜面抛光表面接触， 在清洁的气氛中低于所述第一导电类型，并且热加热所述第一和第二半导体衬底以使它们团结起来。 杂质从所述第一半导体衬底扩散到所述第二半导体衬底中，从而在所述第二半导体衬底中形成第一导电类型的扩散层。 所述扩散层的杂质的总量为1×10 13 / cm 2至2×10 15 / cm 2，以在所述第二半导体衬底中形成pn结。

公开(公告)号：US06417532B2

公开(公告)日：2002-07-09

申请号：US09769398

申请日：2001-01-26

申请人： Tetsujiro Tsunoda ,  Satoshi Nakao ,  Kaoru Imamura ,  Shinichi Umekawa

发明人： Tetsujiro Tsunoda ,  Satoshi Nakao ,  Kaoru Imamura ,  Shinichi Umekawa

IPC分类号： H01L27148

CPC分类号： H02M7/003 ,  H01L2224/48091 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A power semiconductor module comprises a circuit board made of an insulating substrate of good thermal conductivity formed with interconnect patterns, a plurality of power semiconductor chips mounted on the circuit board, bonding wires for electrically connecting the semiconductor chips and the interconnect patterns, outer lead terminals fixed to the interconnect patterns, and a resin layer for covering at least the chip mounted surface of the circuit board in its entirety so that the tip of each of the outer lead terminals is exposed.

摘要翻译： 功率半导体模块包括由互连图案形成的具有良好导热性的绝缘基板制成的电路板，安装在电路板上的多个功率半导体芯片，用于电连接半导体芯片的接合线和互连图案，外引线端子 固定到互连图案，以及树脂层，用于至少覆盖电路板的芯片安装表面，使得每个外部引线端子的末端被暴露。

公开(公告)号：US5065221A

公开(公告)日：1991-11-12

申请号：US412522

申请日：1989-09-26

申请人： Kaoru Imamura

发明人： Kaoru Imamura

IPC分类号： H01C7/00 ,  H01C17/23 ,  H01C17/24 ,  H01C17/26 ,  H01L21/02 ,  H01L21/822 ,  H01L27/01 ,  H01L27/04

CPC分类号： H01L28/20 ,  H01C17/23 ,  H01C17/24

摘要： A trimming resistor element includes a high-resistance film of high resistivity formed on an insulation film on the main surface of a substrate, and a low-resistance region which is formed by selectively subjecting the high-resistance film to a predetermined process so as to lower the resistivity thereof. A resultant resistance of the low-resistance region and the high-resistance film can be adjusted by selectively cutting off part of the low-resistance region.

公开(公告)号：US4928838A

公开(公告)日：1990-05-29

申请号：US293278

申请日：1989-01-04

申请人： Kaoru Imamura

发明人： Kaoru Imamura

IPC分类号： H01C17/242 ,  H01L21/02 ,  H01L21/268 ,  H01L21/82 ,  H01L21/822 ,  H01L27/01 ,  H01L27/04

CPC分类号： H01L28/24 ,  H01C17/242 ,  H01L21/268

摘要： A trimming process by a laser beam is disclosed. The trimming process comprises two steps. In a first step, a laser shield layer is formed over an untrimmed region of a trimmed material adjacent to a trimmed region. The laser shield layer has a higher heat conductivity than the trimmed material and a large reflectivity for laser beam. In a second step, the trimmed material is cut off. To cut off, a laser beam is applied onto the upper surface of the trimmed region of the trimmed material to vaporize the trimmed material in the trimmed region.

公开(公告)号：US4716489A

公开(公告)日：1987-12-29

申请号：US813841

申请日：1985-12-27

申请人： Kaoru Imamura ,  Kenichi Muramoto

发明人： Kaoru Imamura ,  Kenichi Muramoto

IPC分类号： H01L27/06 ,  H01L21/331 ,  H01L27/02 ,  H01L29/73 ,  H01L29/732 ,  H02H3/20

CPC分类号： H01L29/7302 ,  H01L27/0248

摘要： A protection circuit is provided for a planar transistor device. The protection circuit comprises a variable resistor device formed of a junction type field effect transistor. The resistor device is connected in series with the base of the planar transistor. The drain electrode of the J-FET is connected to the base of the planar transistor while the collector of the planar transistor is connected to the gate of the J-FET. Due to this interconnected scheme, base input resistance of the planar transistor is increased to reduce its base current when a high voltage is applied accidentally to the collector. The base current is not eliminated, however, and the device is protected but can still operate.

摘要翻译： 为平面晶体管器件提供保护电路。 保护电路包括由结型场效应晶体管形成的可变电阻器件。 电阻器件与平面晶体管的基极串联连接。 J-FET的漏电极连接到平面晶体管的基极，而平面晶体管的集电极连接到J-FET的栅极。 由于这种相互连接的方案，当将高电压意外施加到集电极时，平面晶体管的基极输入电阻增加以降低其基极电流。 然而，基极电流不被消除，器件受到保护但仍可以工作。

公开(公告)号：US4935386A

公开(公告)日：1990-06-19

申请号：US161097

申请日：1988-02-26

申请人： Akio Nakagawa ,  Kaoru Imamura ,  Ryo Sato ,  Tadahide Hoshi

发明人： Akio Nakagawa ,  Kaoru Imamura ,  Ryo Sato ,  Tadahide Hoshi

IPC分类号： H01L29/68 ,  H01L21/02 ,  H01L21/18 ,  H01L21/22 ,  H01L21/331 ,  H01L21/336 ,  H01L29/739 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/187 ,  H01L21/2205 ,  Y10S148/012 ,  Y10S148/157

摘要： A method of manufacturing a semiconductor device comprising the steps of bringing a mirror-polished surface of a first semiconductor substrate of a first conductivity type into contact with a mirror-polished surface of a second semiconductor substrate of a second conductivity type having an impurity concentration which is lower than that of said first conductivity type, in a clean atmosphere, and thermally heating said first and second semiconductor substrates so that they unite. Impurity is diffused from said first semicondutor substrate into said second semiconductor substrate, thereby forming a diffusion layer of a first conductivity type in said second semiconductor substrate. A total amount of impurity of said diffusion layer is 1.times.10.sup.13 /cm.sup.2 to 2.times.10.sup.15 /cm.sup.2, to form a pn junction in said second semiconductor substrate.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：将具有第一导电类型的第一半导体衬底的镜面抛光表面与具有杂质浓度的第二导电类型的第二半导体衬底的镜面抛光表面接触， 在清洁的气氛中低于所述第一导电类型，并且热加热所述第一和第二半导体衬底以使它们团结起来。 杂质从所述第一半导体基板扩散到所述第二半导体衬底中，从而在所述第二半导体衬底中形成第一导电类型的扩散层。 所述扩散层的杂质的总量为1×10 13 / cm 2至2×10 15 / cm 2，以在所述第二半导体衬底中形成pn结。

公开(公告)号：US4906966A

公开(公告)日：1990-03-06

申请号：US305811

申请日：1989-02-03

申请人： Kaoru Imamura ,  Wataru Takahashi

发明人： Kaoru Imamura ,  Wataru Takahashi

IPC分类号： H01C13/00 ,  H01C17/23 ,  H01C17/24

CPC分类号： H01C17/23

摘要： A trimming resistor network includes first and second external connection terminals, a first resistor having two ends acting as first and second connection terminals, a first coupling body for connecting the first external connection terminal to the first connection terminal via series-connected resistors, a second coupling body for connecting the second external connection terminal to the second connection terminal directly or via series-connected resistors, and parallel trimming resistors having two ends respectively connected to the first and second coupling bodies. The combined resistance between the first and second external connection terminals is increased by substantially a preset amount each time one of the parallel trimming resistors is cut off.