公开(公告)号：US06178214B1

公开(公告)日：2001-01-23

申请号：US09199058

申请日：1998-11-24

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H04L706

CPC分类号： H04L7/007 ,  H04L7/048 ,  H04L7/06 ,  H04L7/08

摘要： In a synchronizing system, a CRC bit end judging circuit judges an end of a CRC bit of the demodulated signal from the demodulating circuit to produce a CRC bit end signal. A RSSI detecting circuit detects a RSSI level of the received signal to produce a RSSI level signal. An edge detecting circuit compares the RSSI level with a predetermined threshold level to produce a level compared result signal when the RSSI level is greater than the predetermined threshold level. The edge detecting circuit masks, in a predetermined time interval, the level compared result signal in response to both of the CRC bit end signal and the level compared result signal. The edge detecting circuit produces a trigger signal in response to the level compared result signal after the predetermined time interval. A bit synchronous circuit produces, in response to the trigger signal, the bit synchronous signal. A bit synchronous correcting circuit corrects the bit synchronous signal to produce and supply a bit synchronous correct signal to the demodulating circuit.

摘要翻译： 在同步系统中，CRC位结束判断电路判定来自解调电路的解调信号的CRC位的结束，以产生CRC位结束信号。 RSSI检测电路检测接收信号的RSSI电平以产生RSSI电平信号。 边缘检测电路将RSSI电平与预定阈值电平进行比较，以在RSSI电平大于预定阈值电平时产生电平比较结果信号。 边缘检测电路响应于CRC位结束信号和电平比较结果信号两者，在预定的时间间隔内屏蔽电平比较结果信号。 边缘检测电路响应于在预定时间间隔之后的电平比较结果信号产生触发信号。 位同步电路响应于触发信号产生位同步信号。 位同步校正电路校正位同步信号，以产生并提供位同步校正信号给解调电路。

公开(公告)号：US20080219021A1

公开(公告)日：2008-09-11

申请号：US11851040

申请日：2007-09-06

申请人： Katsuya Nagashima ,  Yoichi Tatsumi

发明人： Katsuya Nagashima ,  Yoichi Tatsumi

IPC分类号： F21V21/14 ,  F21V7/00

CPC分类号： B60Q1/06 ,  B60Q2200/32 ,  F21V7/22

摘要： A vehicular lighting assembly with a reflection mirror formed of a BMC resin is provided which prevents glass fiber in the resin from separating and flying away when the direction of illumination is changed for aiming, which can result in degradation in appearance of the reflector or occurrence of glare. The vehicular lighting assembly can be configured such that a high-beam reflector and a low-beam lighting assembly attachment are formed of a plastic member made of the BMC resin as an integrated lighting assembly holder portion. The low-beam lighting assembly attachment of the lighting assembly holder portion can include a low-beam reflector, ball joints, and an adjusting nut attachment engaged with an adjusting screw, so that it can be aimed. The ball joints and the adjusting nut attachment are formed at their respective positions on an integrated metallic member so that they can be attached as an aiming unit to the low-beam lighting assembly attachment.

摘要翻译： 提供了一种具有由BMC树脂形成的反射镜的车辆照明组件，当照明方向改变时，防止树脂中的玻璃纤维分离和飞离，这可能导致反射器的外观劣化或发生 强光。 车辆照明组件可以被配置为使得远光反射器和近光照明组件附件由作为集成照明组件保持器部分的由BMC树脂制成的塑料构件形成。 照明组件保持器部分的近光照明组件附件可以包括近光反射器，球形接头和与调节螺钉接合的调节螺母附件，使得其可以被瞄准。 球形接头和调节螺母附件形成在集成金属构件的各自位置，使得它们可以作为瞄准单元附接到近光照明组件附件。

公开(公告)号：US06463050B1

公开(公告)日：2002-10-08

申请号：US09181166

申请日：1998-10-28

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H04B7212

CPC分类号： H04W52/245 ,  H04W52/287

摘要： In a radio base station of a TDMA communications system, an occupied time slot is discriminated from an idle time slot in a frame to produce a discrimination signal. A power control signal for a receiver is switched between a first state and a second state in time slots depending on the discrimination signal. The power control signal is switched to the first state at timing of the occupied time slot and to the second state at timing of the idle time slot.

摘要翻译： 在TDMA通信系统的无线基站中，从帧中的空闲时隙来区分占用时隙，生成鉴别信号。 接收机的功率控制信号根据鉴别信号在时隙中在第一状态和第二状态之间切换。 在空闲时隙的定时，功率控制信号在占用时隙的定时切换到第一状态，并切换到第二状态。

公开(公告)号：US07006584B1

公开(公告)日：2006-02-28

申请号：US09609532

申请日：2000-06-30

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H04L27/14

CPC分类号： H04L27/2331

摘要： A demodulator and a demodulating method for a mobile phone are provided. In particular, the present invention can simultaneously perform operation of improving the demodulation error rate caused by such as noise and external feedback loop operation being correction after detected, and can reduce the current consumption by restraining the increase of the process time at the simultaneous operation with an external correction circuit after detected, and can improve the CN ratio (ratio between carrier power and noise power). The present invention provides a received error rate improving means which improves the received error rate by weighting for differences at symbols before and after a symbol to be demodulated at the present time and applying feedback for symbols, a weighting means for applying weighting for correction values after detected of external another loop, a deciding the order of priority means for deciding the order of priority for plural correction values, and an adapting itself to various radio wave environment and the kinds of noise by using the weighting means and the deciding the order of priority means.

摘要翻译： 提供了一种用于移动电话的解调器和解调方法。 特别地，本发明可以同时进行提高由噪声和外部反馈环路操作引起的解调错误率的操作，这是在检测到之后进行校正，并且可以通过抑制在同时操作时的处理时间的增加来减少电流消耗， 外部校正电路检测后，可以提高CN比（载波功率与噪声功率之比）。 本发明提供了一种接收错误率改进装置，其通过对当前时刻要解调的符号之前和之后的符号的差异进行加权来提高接收错误率，并对符号应用反馈;加权装置， 检测外部另一个环路，确定用于决定多个校正值的优先级顺序的优先顺序的顺序，以及通过使用加权装置自适应各种无线电波环境和噪声的种类，并确定优先级顺序 手段。

公开(公告)号：US6122333A

公开(公告)日：2000-09-19

申请号：US30939

申请日：1998-02-26

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H04L27/22 ,  H04B7/08 ,  H04L1/02 ,  H04L1/06 ,  H04B1/10 ,  H04B17/02

CPC分类号： H04B7/0857 ,  H04L1/06

摘要： Disclosed is a delay detection demodulation system which has: a plurality of receiving systems; a plurality of instantaneous phase detecting circuits for detecting an instantaneous phase from the output of each of the plurality of receiving systems; a plurality of phase difference operating circuits for determining a phase difference in one symbol section from the output of each of the plurality of instantaneous phase detecting circuits; a combining circuit for combining the outputs of the plurality of operating circuits; a delay detection circuit for conducting error diffusion type delay detection after the combining of the combining circuit; and a demodulation logical circuit for conducting demodulation logical operation.

摘要翻译： 公开了一种延迟检测解调系统，其具有：多个接收系统; 多个瞬时相位检测电路，用于从所述多个接收系统中的每一个的输出检测瞬时相位; 多个相位差运算电路，用于从多个瞬时相位检测电路中的每一个的输出确定一个符号部分的相位差; 组合电路，用于组合多个操作电路的输出; 延迟检测电路，用于在组合电路组合之后进行误差扩散型延迟检测; 以及用于进行解调逻辑运算的解调逻辑电路。

公开(公告)号：US07566153B2

公开(公告)日：2009-07-28

申请号：US11851040

申请日：2007-09-06

申请人： Katsuya Nagashima ,  Yoichi Tatsumi

发明人： Katsuya Nagashima ,  Yoichi Tatsumi

IPC分类号： F21V17/02

CPC分类号： B60Q1/06 ,  B60Q2200/32 ,  F21V7/22

摘要： A vehicular lighting assembly with a reflection mirror formed of a BMC resin is provided which prevents glass fiber in the resin from separating and flying away when the direction of illumination is changed for aiming, which can result in degradation in appearance of the reflector or occurrence of glare. The vehicular lighting assembly can be configured such that a high-beam reflector and a low-beam lighting assembly attachment are formed of a plastic member made of the BMC resin as an integrated lighting assembly holder portion. The low-beam lighting assembly attachment of the lighting assembly holder portion can include a low-beam reflector, ball joints, and an adjusting nut attachment engaged with an adjusting screw, so that it can be aimed. The ball joints and the adjusting nut attachment are formed at their respective positions on an integrated metallic member so that they can be attached as an aiming unit to the low-beam lighting assembly attachment.

摘要翻译： 提供了一种具有由BMC树脂形成的反射镜的车辆照明组件，当照明方向改变时，防止树脂中的玻璃纤维分离和飞离，这可能导致反射器的外观劣化或发生 强光。 车辆照明组件可以被配置为使得远光反射器和近光照明组件附件由作为集成照明组件保持器部分的由BMC树脂制成的塑料构件形成。 照明组件保持器部分的近光照明组件附件可以包括近光反射器，球形接头和与调节螺钉接合的调节螺母附件，使得其可以被瞄准。 球形接头和调节螺母附件形成在集成金属构件的各自位置，使得它们可以作为瞄准单元附接到近光照明组件附件。

公开(公告)号：US5898741A

公开(公告)日：1999-04-27

申请号：US879232

申请日：1997-06-19

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H04B1/02 ,  H04B7/08 ,  H04L7/02 ,  H04L7/033

CPC分类号： H04L7/0054 ,  H04B7/0857 ,  H04B7/0802

摘要： A delayed detection MRC diversity circuit which does not adjust synchronization in every reception branch independently having a simple circuit constitution and superior receiving characteristics. The delayed detection MRC diversity circuit is composed of a comparison circuit for selecting a reception branch with maximum RSSI, a selector, a base band circuit such as synchronous circuit and so forth for generating a regenerative clock while adjusting bit-synchronization in terms of the reception branch with the maximum RSSI, and a MRC diversity circuit section for composing using the regenerative clock.

摘要翻译： 延迟检测MRC分集电路，其独立地具有简单的电路结构和优异的接收特性，不调整每个接收支路中的同步。 延迟检测MRC分集电路由用于选择具有最大RSSI的接收支路的比较电路，选择器，诸如同步电路等的基带电路组成，用于在接收时调整位同步来产生再生时钟 分支具有最大RSSI，以及MRC分集电路部分，用于使用再生时钟进行组合。

公开(公告)号：US5432485A

公开(公告)日：1995-07-11

申请号：US278162

申请日：1994-07-21

申请人： Katsuya Nagashima

发明人： Katsuya Nagashima

IPC分类号： H01P1/00 ,  H01P3/08 ,  H01P5/16 ,  H05K1/02 ,  H05K3/46 ,  H01P5/12

CPC分类号： H05K1/0237 ,  H01P5/16 ,  H01L2223/6627 ,  H01L2924/15192 ,  H01L2924/1903 ,  H05K2201/09245 ,  H05K2201/09254

摘要： A cross circuit comprises a lattice structure formed on a single layer of a multilayer printed circuit, the lattice structure having an arrangement of nodes consisting of two input nodes, two output nodes, a center node and four other nodes which are connected by quarter-wavelength lines. An input node is connected to both a first node and a second node by a quarter-wavelength line, and the other input node is connected to both the first node and a third node by a quarter-wavelength line. Similarly, an output node is connected to both the third node and a fourth node, the other output node to both the fourth node and the second node, the center node to the four nodes, by quarter-wavelength lines, respectively. A first input signal of a predetermined frequency applied to the first input node appears on only the first output node, and the second input signal of the same frequency applied to the second input node appears on only the second output node.

摘要翻译： 交叉电路包括形成在多层印刷电路的单层上的晶格结构，所述晶格结构具有由两个输入节点，两个输出节点，中心节点和四个其他节点组成的节点的布置，所述节点由四分之一波长 线条。 输入节点通过四分之一波长的线连接到第一节点和第二节点，另一个输入节点通过四分之一波长的线连接到第一节点和第三节点。 类似地，输出节点分别连接到第三节点和第四节点，另一个输出节点连接到第四节点和第二节点，中心节点连接到四个节点，四分之一波长线。 施加到第一输入节点的预定频率的第一输入信号仅出现在第一输出节点上，并且施加到第二输入节点的相同频率的第二输入信号仅出现在第二输出节点上。