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公开(公告)号：US20110284987A1
公开(公告)日：2011-11-24
申请号：US13110630
申请日：2011-05-18
申请人： Yasuki YOSHIHISA , Kikuo KATO , Tetsuya NITTA , Kazuma ONISHI
发明人： Yasuki YOSHIHISA , Kikuo KATO , Tetsuya NITTA , Kazuma ONISHI
IPC分类号： H01L29/06
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/0251 , H01L27/088
摘要： There is provided a semiconductor device capable of suppressing malfunction of an element to be protected, caused by electrons from an output element into a semiconductor substrate. The semiconductor device is provided with the semiconductor substrate, the output element, the element to be protected, a tap part, and a first active-barrier structure. The first active-barrier structure is disposed between the element to be protected and the tap part. Further, the first active-barrier structure includes an n-type region joined with a p-type doped region, and a p-type region in ohmic coupling with the n-type region.
摘要翻译： 提供一种半导体器件，其能够抑制从输出元件到半导体衬底的电子引起的被保护元件的故障。 半导体器件设置有半导体衬底，输出元件，要保护的元件，抽头部件和第一有源屏障结构。 第一主动阻挡结构设置在待保护元件与抽头部件之间。 此外，第一有源屏障结构包括与p型掺杂区域连接的n型区域和与n型区域欧姆耦合的p型区域。
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公开(公告)号：US20110062547A1
公开(公告)日：2011-03-17
申请号：US12882863
申请日：2010-09-15
申请人： Kazuma ONISHI , Yoshitaka Otsu , Hiroshi Kimura , Tetsuya Nitta , Shinichiro Yanagi , Katsumi Morii
发明人： Kazuma ONISHI , Yoshitaka Otsu , Hiroshi Kimura , Tetsuya Nitta , Shinichiro Yanagi , Katsumi Morii
CPC分类号： H01L29/0649 , H01L21/764 , H01L21/823807 , H01L21/823814 , H01L21/82385 , H01L21/823857 , H01L21/823878 , H01L21/823892 , H01L27/0922 , H01L27/11521 , H01L27/11526 , H01L29/0653 , H01L29/0878 , H01L29/1083 , H01L29/1087 , H01L29/456 , H01L29/4933 , H01L29/66689 , H01L29/7816 , H01L29/7835
摘要： A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.
摘要翻译： 一种半导体器件，其通过简单的工艺消除了对高填充性的需要及其制造方法。 在半导体衬底的表面上完成包括源极区和漏极区的高击穿电压横向MOS晶体管。 在半导体衬底的表面中制造在平面图中观察时围绕晶体管的沟槽。 在晶体管和沟槽中形成绝缘膜，以覆盖晶体管并在沟槽中形成气隙空间。 到达晶体管的源极区域和漏极区域的接触孔分别制成层间绝缘膜。
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公开(公告)号：US20110175205A1
公开(公告)日：2011-07-21
申请号：US13010417
申请日：2011-01-20
申请人： Katsumi MORII , Yoshitaka OTSU , Kazuma ONISHI , Tetsuya NITTA , Tatsuya SHIROMOTO , Shigeo TOKUMITSU
发明人： Katsumi MORII , Yoshitaka OTSU , Kazuma ONISHI , Tetsuya NITTA , Tatsuya SHIROMOTO , Shigeo TOKUMITSU
CPC分类号： H01L21/76283 , H01L21/76232 , H01L21/823878 , H01L22/34 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.
摘要翻译： 提供可以使用简单的工艺制造而不确保高嵌入性的半导体器件; 以及该装置的制造方法。 在根据本发明的半导体器件的制造方法中，首先准备具有通过堆叠支撑衬底，埋入绝缘膜和半导体层获得的构造的半导体衬底。 然后，在半导体层的主表面上完成具有导电部分的元件。 形成了在平面图中包围元件并从半导体层的主表面到达掩埋绝缘膜的沟槽。 在元件上和沟槽中形成第一绝缘膜（层间绝缘膜）以覆盖元件并分别在沟槽中形成气隙。 然后，在第一绝缘膜中形成到达元件的导电部分的接触孔。
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公开(公告)号：US08357989B2
公开(公告)日：2013-01-22
申请号：US12882863
申请日：2010-09-15
申请人： Kazuma Onishi , Yoshitaka Otsu , Hiroshi Kimura , Tetsuya Nitta , Shinichiro Yanagi , Katsumi Morii
发明人： Kazuma Onishi , Yoshitaka Otsu , Hiroshi Kimura , Tetsuya Nitta , Shinichiro Yanagi , Katsumi Morii
CPC分类号： H01L29/0649 , H01L21/764 , H01L21/823807 , H01L21/823814 , H01L21/82385 , H01L21/823857 , H01L21/823878 , H01L21/823892 , H01L27/0922 , H01L27/11521 , H01L27/11526 , H01L29/0653 , H01L29/0878 , H01L29/1083 , H01L29/1087 , H01L29/456 , H01L29/4933 , H01L29/66689 , H01L29/7816 , H01L29/7835
摘要： A semiconductor device which eliminates the need for high fillability through a simple process and a method for manufacturing the same. A high breakdown voltage lateral MOS transistor including a source region and a drain region is completed on a surface of a semiconductor substrate. A trench which surrounds the transistor when seen in a plan view is made in the surface of the semiconductor substrate. An insulating film is formed over the transistor and in the trench so as to cover the transistor and form an air-gap space in the trench. Contact holes which reach the source region and drain region of the transistor respectively are made in an interlayer insulating film.
摘要翻译： 一种半导体器件，其通过简单的工艺消除了对高填充性的需要及其制造方法。 在半导体基板的表面上完成包括源极区域和漏极区域的高耐压侧的横向MOS晶体管。 在半导体衬底的表面中制造在平面图中观察时围绕晶体管的沟槽。 在晶体管和沟槽中形成绝缘膜，以覆盖晶体管并在沟槽中形成气隙空间。 到达晶体管的源极区域和漏极区域的接触孔分别制成层间绝缘膜。
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公开(公告)号：US08344458B2
公开(公告)日：2013-01-01
申请号：US13110630
申请日：2011-05-18
申请人： Yasuki Yoshihisa , Kikuo Kato , Tetsuya Nitta , Kazuma Onishi
发明人： Yasuki Yoshihisa , Kikuo Kato , Tetsuya Nitta , Kazuma Onishi
IPC分类号： H01L23/62
CPC分类号： H01L21/76224 , H01L21/823481 , H01L27/0251 , H01L27/088
摘要： There is provided a semiconductor device capable of suppressing malfunction of an element to be protected, caused by electrons from an output element into a semiconductor substrate. The semiconductor device is provided with the semiconductor substrate, the output element, the element to be protected, a tap part, and a first active-barrier structure. The first active-barrier structure is disposed between the element to be protected and the tap part. Further, the first active-barrier structure includes an n-type region joined with a p-type doped region, and a p-type region in ohmic coupling with the n-type region.
摘要翻译： 提供一种半导体器件，其能够抑制从输出元件到半导体衬底的电子引起的被保护元件的故障。 半导体器件设置有半导体衬底，输出元件，要保护的元件，抽头部件和第一有源屏障结构。 第一主动阻挡结构设置在待保护元件与抽头部件之间。 此外，第一有源屏障结构包括与p型掺杂区域连接的n型区域和与n型区域欧姆耦合的p型区域。
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公开(公告)号：US08569839B2
公开(公告)日：2013-10-29
申请号：US13010417
申请日：2011-01-20
申请人： Katsumi Morii , Yoshitaka Otsu , Kazuma Onishi , Tetsuya Nitta , Tatsuya Shiromoto , Shigeo Tokumitsu
发明人： Katsumi Morii , Yoshitaka Otsu , Kazuma Onishi , Tetsuya Nitta , Tatsuya Shiromoto , Shigeo Tokumitsu
IPC分类号： H01L21/8238 , H01L21/70
CPC分类号： H01L21/76283 , H01L21/76232 , H01L21/823878 , H01L22/34 , H01L27/1203 , H01L2924/0002 , H01L2924/00
摘要： To provide a semiconductor device that can be manufactured using a simple process without ensuring a high embedding property; and a manufacturing method of the device. In the manufacturing method of the semiconductor device according to the invention, a semiconductor substrate having a configuration obtained by stacking a support substrate, a buried insulating film, and a semiconductor layer in order of mention is prepared first. Then, an element having a conductive portion is completed over the main surface of the semiconductor layer. A trench encompassing the element in a planar view and reaching the buried insulating film from the main surface of the semiconductor layer is formed. A first insulating film (interlayer insulating film) is formed over the element and in the trench to cover the element and form an air gap in the trench, respectively. Then, a contact hole reaching the conductive portion of the element is formed in the first insulating film.
摘要翻译： 提供可以使用简单的工艺制造而不确保高嵌入性的半导体器件; 以及该装置的制造方法。 在根据本发明的半导体器件的制造方法中，首先准备具有通过堆叠支撑衬底，埋入绝缘膜和半导体层获得的构造的半导体衬底。 然后，在半导体层的主表面上完成具有导电部分的元件。 形成了在平面图中包围元件并从半导体层的主表面到达掩埋绝缘膜的沟槽。 在元件上和沟槽中形成第一绝缘膜（层间绝缘膜）以覆盖元件并分别在沟槽中形成气隙。 然后，在第一绝缘膜中形成到达元件的导电部分的接触孔。
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