公开(公告)号：US20110081752A1

公开(公告)日：2011-04-07

申请号：US12785932

申请日：2010-05-24

申请人： Kazuo SHIMOYAMA ,  Manabu TAKEI ,  Haruo NAKAZAWA

发明人： Kazuo SHIMOYAMA ,  Manabu TAKEI ,  Haruo NAKAZAWA

IPC分类号： H01L21/331

CPC分类号： H01L29/7393 ,  H01L21/30608 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2221/68327 ,  H01L2221/68381

摘要： A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost.

摘要翻译： 形成半导体芯片的上表面结构和底面结构的薄半导体晶片通过双面胶带固定在支撑基板上。 然后，在薄半导体晶片上，通过湿式各向异性蚀刻形成成为划刻线的沟槽，其中晶体面被暴露以形成沟槽的侧壁。 在具有如此露出的晶面的沟槽的侧壁上，通过离子注入和低温退火或激光退火形成用于保持反向击穿电压的隔离层，以便在与...接触的同时延伸到顶表面侧 ap集电极区域作为底面扩散层。 然后，进行激光切割，与集电体区域一起形成在集电极区域上的集电极整齐地切割，而不会在隔离层下方产生任何过量的部分和不足的部分。 此后，从集电极去除双面胶带以制造半导体芯片。 因此可以以低成本形成高度可靠的反向阻挡半导体器件。

公开(公告)号：US20110006403A1

公开(公告)日：2011-01-13

申请号：US12784162

申请日：2010-05-20

申请人： Katsuya OKUMURA ,  Hiroki WAKIMOTO ,  Kazuo SHIMOYAMA ,  Tomoyuki YAMAZAKI

发明人： Katsuya OKUMURA ,  Hiroki WAKIMOTO ,  Kazuo SHIMOYAMA ,  Tomoyuki YAMAZAKI

IPC分类号： H01L29/06 ,  H01L21/302

CPC分类号： H01L29/0661 ,  H01L21/76224 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395

摘要： A semiconductor device is disclosed which includes active section 100, edge termination section 110 having a voltage blocking structure and disposed around active section 100, and separation section 120 having a device separation structure and disposed around edge termination section 110. A surface device structure is formed on the first major surface of active section 100, trench 23 is formed in separation section 120 from the second major surface side, and p+-type separation region 24 is formed on the side wall of trench 23 such that p+-type separation region 24 is in contact with p-type channel stopper region 21 formed in the surface portion on the first major surface side and p-type collector layer 9 formed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.

摘要翻译： 公开了一种半导体器件，其包括有源部分100，具有电压阻挡结构并设置在有源部分100周围的边缘终端部分110以及具有设备分离结构并且设置在边缘终端部分110周围的分离部分120.形成表面器件结构 在有源部分100的第一主表面上，在分离部分120中形成沟槽23与第二主表面侧，并且在沟槽23的侧壁上形成p +型分离区域24，使得p +型分离区域24为 与形成在第一主表面侧的表面部分中的p型沟道停止区域21和形成在第二主表面侧的表面部分中的p型集电极层9接触。 根据本发明的半导体器件和制造半导体器件的方法有助于防止反向阻断电压降低并缩短半导体器件的制造时间。

公开(公告)号：US20060249797A1

公开(公告)日：2006-11-09

申请号：US11389495

申请日：2006-03-27

申请人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

发明人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

IPC分类号： H01L29/732 ,  H01L21/8249

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 该方法包括在导电型半导体衬底的主表面中形成具有V形或梯形形状的横截面的沟槽。 将另一导电型半导体衬底引入到沟槽的侧壁中。 通过激光照射激活基板，其中沟槽的侧壁形成相对于主表面具有七十度或更小的倾斜角。 对于包括衬底的半导体器件也包括独立权利要求。

公开(公告)号：US08697558B2

公开(公告)日：2014-04-15

申请号：US12575730

申请日：2009-10-08

申请人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

发明人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

IPC分类号： H01L29/45

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 在薄的半导体晶片的顶表面上形成形成半导体芯片的顶表面结构。 晶片的上表面用双面胶带固定在支撑基板上。 然后，从薄的半导体晶片的底面开始，通过湿式各向异性蚀刻形成成为刻划线的沟槽，使得沟槽的侧壁露出。 在暴露了晶面的沟槽的侧壁上，通过离子注入与底面扩散层的集电极区域同时形成具有不同于用于保持反向击穿电压的半导体晶片的导电类型的隔离层， 然后用激光照射退火。 侧壁形成大致V形或梯形形状的横截面，侧壁相对于支撑基底的角度为30-70°。 然后从上表面去除双面胶带以制造半导体芯片。 通过这样的制造方法，可以形成具有高可靠性的反向阻挡半导体器件。

公开(公告)号：US20110108883A1

公开(公告)日：2011-05-12

申请号：US12989226

申请日：2009-05-13

申请人： Yasuhiko Tsukamoto ,  Kazuo Shimoyama

发明人： Yasuhiko Tsukamoto ,  Kazuo Shimoyama

IPC分类号： H01L29/739 ,  H01L21/331

CPC分类号： H01L21/26586 ,  H01L21/268 ,  H01L21/67282 ,  H01L21/78 ,  H01L23/544 ,  H01L29/0657 ,  H01L29/7395 ,  H01L2223/54426 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

摘要： Cutting work is performed on an n-semiconductor substrate (1) with an inverted trapezoid-shaped dicing blade to form grooves to be a second side walls (7). Bottom portions of the grooves are contacted with a p-diffusion layer (4) which is formed on a first principal plane (2) (front face) of the n-semiconductor substrate (1), so that the p-diffusion layer (4) is not cut. Then in the second side walls (7), a p-isolation layer (9) connected to a p-collector layer (8) and the p-diffusion layer (4) is formed. Since the p-diffusion layer (4) is not cut, a glass support substrate for supporting a wafer, and expensive adhesive, are not required, and therefore the p-isolation layer (4) can be formed at low cost.

摘要翻译： 在具有倒梯形切割刀片的n半导体基板（1）上进行切割加工，以形成作为第二侧壁（7）的槽。 凹槽的底部与形成在n半导体衬底（1）的第一主平面（2）（正面）上的p扩散层（4）接触，使得p扩散层（4） ）没有切。 然后在第二侧壁（7）中，形成连接到p集电极层（8）和p扩散层（4）的p隔离层（9）。 由于p扩散层（4）不被切割，不需要用于支撑晶片的玻璃支撑基板和昂贵的粘合剂，因此可以以低成本形成p-隔离层（4）。

公开(公告)号：US20100264455A1

公开(公告)日：2010-10-21

申请号：US12824541

申请日：2010-06-28

申请人： Haruo NAKAZAWA ,  Kazuo SHIMOYAMA ,  Manabu TAKEI

发明人： Haruo NAKAZAWA ,  Kazuo SHIMOYAMA ,  Manabu TAKEI

IPC分类号： H01L29/739 ,  H01L29/06

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 在薄的半导体晶片的顶表面上形成形成半导体芯片的顶表面结构。 晶片的上表面用双面胶带固定在支撑基板上。 然后，从薄的半导体晶片的底面开始，通过湿式各向异性蚀刻形成成为刻划线的沟槽，使得沟槽的侧壁露出。 在暴露了晶面的沟槽的侧壁上，通过离子注入与底面扩散层的集电极区域同时形成具有不同于用于保持反向击穿电压的半导体晶片的导电类型的隔离层， 然后用激光照射退火。 侧壁形成大致V形或梯形形状的横截面，侧壁相对于支撑基底的角度为30-70°。 然后从上表面去除双面胶带以制造半导体芯片。 通过这样的制造方法，可以形成具有高可靠性的反向阻挡半导体器件。

公开(公告)号：US08531007B2

公开(公告)日：2013-09-10

申请号：US12784162

申请日：2010-05-20

申请人： Katsuya Okumura ,  Hiroki Wakimoto ,  Kazuo Shimoyama ,  Tomoyuki Yamazaki

发明人： Katsuya Okumura ,  Hiroki Wakimoto ,  Kazuo Shimoyama ,  Tomoyuki Yamazaki

IPC分类号： H01L29/06 ,  H01L21/302

CPC分类号： H01L29/0661 ,  H01L21/76224 ,  H01L29/0619 ,  H01L29/0657 ,  H01L29/0696 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395

摘要： A semiconductor device is disclosed which includes active section 100, edge termination section 110 having a voltage blocking structure and disposed around active section 100, and separation section 120 having a device separation structure and disposed around edge termination section 110. A surface device structure is formed on the first major surface of active section 100, trench 23 is formed in separation section 120 from the second major surface side, and p+-type separation region 24 is formed on the side wall of trench 23 such that p+-type separation region 24 is in contact with p-type channel stopper region 21 formed in the surface portion on the first major surface side and p-type collector layer 9 formed in the surface portion on the second major surface side. The semiconductor device and the method for manufacturing the semiconductor device according to the invention facilitate preventing the reverse blocking voltage from decreasing and shorten the manufacturing time of the semiconductor device.

摘要翻译： 公开了一种半导体器件，其包括有源部分100，具有电压阻挡结构并设置在有源部分100周围的边缘终端部分110以及具有设备分离结构并且设置在边缘终端部分110周围的分离部分120.形成表面器件结构 在有源部分100的第一主表面上，在分离部分120中形成沟槽23与第二主表面侧，并且在沟槽23的侧壁上形成p +型分离区域24，使得p +型分离区域24为 与形成在第一主表面侧的表面部分中的p型沟道停止区域21和形成在第二主表面侧的表面部分中的p型集电极层9接触。 根据本发明的半导体器件和制造半导体器件的方法有助于防止反向阻断电压降低并缩短半导体器件的制造时间。

公开(公告)号：US07776672B2

公开(公告)日：2010-08-17

申请号：US11389495

申请日：2006-03-27

申请人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

发明人： Haruo Nakazawa ,  Kazuo Shimoyama ,  Manabu Takei

IPC分类号： H01L21/336

CPC分类号： H01L29/0661 ,  H01L29/045 ,  H01L29/0615 ,  H01L29/0657 ,  H01L29/66333 ,  H01L29/7395

摘要： On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.

摘要翻译： 在薄的半导体晶片的顶表面上形成形成半导体芯片的顶表面结构。 晶片的上表面用双面胶带固定在支撑基板上。 然后，从薄的半导体晶片的底面开始，通过湿式各向异性蚀刻形成成为刻划线的沟槽，使得沟槽的侧壁露出。 在暴露了晶面的沟槽的侧壁上，通过离子注入与底面扩散层的集电极区域同时形成具有不同于用于保持反向击穿电压的半导体晶片的导电类型的隔离层， 然后用激光照射退火。 侧壁形成大致V形或梯形形状的横截面，侧壁相对于支撑基底的角度为30-70°。 然后从上表面去除双面胶带以制造半导体芯片。 通过这样的制造方法，可以形成具有高可靠性的反向阻挡半导体器件。

公开(公告)号：US20060038206A1

公开(公告)日：2006-02-23

申请号：US11208459

申请日：2005-08-19

申请人： Kazuo Shimoyama ,  Manabu Takei ,  Haruo Nakazawa

发明人： Kazuo Shimoyama ,  Manabu Takei ,  Haruo Nakazawa

IPC分类号： H01L29/80

CPC分类号： H01L29/7393 ,  H01L21/30608 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2221/68327 ,  H01L2221/68381

摘要： A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate by a double-sided adhesive tape. Then, on the thin semiconductor wafer, a trench to become a scribing line is formed by wet anisotropic etching with a crystal face exposed so as to form a side wall of the trench. On the side wall of the trench with the crystal face thus exposed, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to neatly dice a collector electrode, formed on the p collector region, together with the p collector region, without presenting any excessive portions and any insufficient portions under the isolation layer. Thereafter, the double-sided adhesive tape is removed from the collector electrode to produce semiconductor chips. A highly reliable reverse-blocking semiconductor device can thus be formed at a low cost.

摘要翻译： 形成半导体芯片的上表面结构和底面结构的薄半导体晶片通过双面胶带固定在支撑基板上。 然后，在薄半导体晶片上，通过湿式各向异性蚀刻形成成为划刻线的沟槽，其中晶体面被暴露以形成沟槽的侧壁。 在具有如此露出的晶面的沟槽的侧壁上，通过离子注入和低温退火或激光退火形成用于保持反向击穿电压的隔离层，以便在与...接触的同时延伸到顶表面侧 ap集电极区域作为底面扩散层。 然后，进行激光切割，与集电体区域一起形成在集电极区域上的集电极整齐地切割，而不会在隔离层下方产生任何过量的部分和不足的部分。 此后，从集电极去除双面胶带以制造半导体芯片。 因此可以以低成本形成高度可靠的反向阻挡半导体器件。

公开(公告)号：US20120184083A1

公开(公告)日：2012-07-19

申请号：US13352581

申请日：2012-01-18

申请人： Kazuo SHIMOYAMA ,  Manabu TAKEI ,  Haruo NAKAZAWA

发明人： Kazuo SHIMOYAMA ,  Manabu TAKEI ,  Haruo NAKAZAWA

IPC分类号： H01L21/78

CPC分类号： H01L29/7393 ,  H01L21/30608 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0646 ,  H01L29/0649 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0834 ,  H01L29/402 ,  H01L29/66333 ,  H01L29/7395 ,  H01L2221/68327 ,  H01L2221/68381

摘要： A thin semiconductor wafer, on which a top surface structure and a bottom surface structure that form a semiconductor chip are formed, is affixed to a supporting substrate. Then, on the wafer, a trench to become a scribing line is formed with a crystal face exposed so as to form a side wall of the trench. On that side wall, an isolation layer for holding a reverse breakdown voltage is formed by ion implantation and low temperature annealing or laser annealing so as to be extended to the top surface side while being in contact with a p collector region as a bottom surface diffused layer. Then, laser dicing is carried out to dice a collector electrode, formed on the p collector region, together with the p collector region.

摘要翻译： 在其上形成有形成半导体芯片的顶表面结构和底表面结构的薄半导体晶片被固定到支撑衬底。 然后，在晶片上形成成为划线的沟槽，其上露出一个晶面以形成沟槽的侧壁。 在该侧壁上，通过离子注入和低温退火或激光退火形成用于保持反向击穿电压的隔离层，以便在与作为底表面扩散层的ap集电极区域接触的同时延伸到顶表面侧 。 然后，进行激光切割以与p收集区一起形成在集电极区上形成的集电极。