公开(公告)号：US07482285B2

公开(公告)日：2009-01-27

申请号：US10274644

申请日：2002-10-17

申请人： Zhijun Qu ,  Kenneth Wagers

发明人： Zhijun Qu ,  Kenneth Wagers

IPC分类号： H01L21/33 ,  H01L21/3205 ,  H01L21/8238 ,  H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0878 ,  H01L29/66333

摘要： The epitaxial silicon junction receiving layer of a power semiconductor device is formed of upper and lower layers. The lower layer has a resistivity of more than that of the upper layer and a thickness of more than that of the upper layer. The total thickness of the two layers is less than that of a single epitaxial layer that would be used for the same blocking voltage. P-N junctions are formed in the upper layer to define a vertical conduction power MOSFET device. The on-resistance is reduced more than 10% without any blocking voltage reduce. The upper epitaxial layer can be either by direct second layer deposition or by ion implantation of a uniform epitaxial layer followed by a driving process.

摘要翻译： 功率半导体器件的外延硅结接收层由上层和下层形成。 下层的电阻率大于上层的电阻率，其厚度大于上层的电阻率。 两层的总厚度小于将用于相同阻挡电压的单个外延层的总厚度。 在上层形成P-N结以限定垂直传导功率MOSFET器件。 导通电阻降低10％以上，无任何阻塞电压降低。 上部外延层可以通过直接的第二层沉积或通过离子注入均匀的外延层，随后进行驱动过程。

公开(公告)号：US06563197B1

公开(公告)日：2003-05-13

申请号：US09989217

申请日：2001-11-20

申请人： Kenneth Wagers ,  Yanping Ma ,  Jianjun Cao

发明人： Kenneth Wagers ,  Yanping Ma ,  Jianjun Cao

IPC分类号： H01L2978

CPC分类号： H01L29/7811 ,  H01L29/402 ,  H01L29/7802

摘要： Guard ring diffusions in the termination of a MOSgated device are laterally spaced from one another and are disposed beneath and are insulated from the termination field plate which extends from the periphery of the device active area.

摘要翻译： 在MOS MOS器件的终端中的保护环扩散彼此横向间隔开并且设置在从器件有效区域的周边延伸的终端场板的下方并与之隔绝。

公开(公告)号：US6127709A

公开(公告)日：2000-10-03

申请号：US444429

申请日：1999-11-19

申请人： Kenneth Wagers ,  Ming Zhou

发明人： Kenneth Wagers ,  Ming Zhou

IPC分类号： H01L21/765 ,  H01L29/06 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L29/0619 ,  H01L21/765

摘要： A semiconductor device includes a guard ring in the termination area that is formed using the same processing steps that form the active area of the device and without requiring additional masking steps or a passivation layer. The guard ring is formed in an opening in the field oxide located in the termination area and is electrically connected to a polysilicon field plate that is located atop a portion of the field oxide region. The guard ring increases the rated voltage of the device without the introduction of a passivation layer.

摘要翻译： 半导体器件包括终端区域中的保护环，该保护环使用形成器件的有效区域并且不需要附加掩模步骤或钝化层的相同处理步骤形成。 保护环形成在位于终端区域中的场氧化物的开口中，并且电连接到位于场氧化物区域的一部分顶部的多晶硅场板。 保护环增加了器件的额定电压，而没有引入钝化层。

公开(公告)号：US6022790A

公开(公告)日：2000-02-08

申请号：US129651

申请日：1998-08-05

申请人： Kenneth Wagers ,  Ming Zhou

发明人： Kenneth Wagers ,  Ming Zhou

IPC分类号： H01L21/765 ,  H01L29/06 ,  H01L21/76

CPC分类号： H01L29/0619 ,  H01L21/765

摘要： A method is presented for forming a guard ring of a semiconductor device in the termination area in tandem with forming the active area structure of the device. The guard ring is formed using the same processing steps that form the active region structure, at the same time, without requiring additional masking steps or a passivation layer. The guard ring is formed in an opening in the field oxide located in the termination area and is electrically connected to a polysilicon field plate that is located atop a portion of the field oxide region. The guard ring increases the rated voltage of the device without the introduction of a passivation layer.

摘要翻译： 提出了一种用于在终端区域中形成半导体器件的保护环的方法，与形成器件的有源区域结构并行。 使用与形成有源区结构相同的处理步骤同时形成保护环，而不需要额外的掩蔽步骤或钝化层。 保护环形成在位于终端区域中的场氧化物的开口中，并且电连接到位于场氧化物区域的一部分顶部的多晶硅场板。 保护环增加了器件的额定电压，而没有引入钝化层。

公开(公告)号：US06919241B2

公开(公告)日：2005-07-19

申请号：US10613327

申请日：2003-07-03

申请人： Daniel M. Kinzer ,  Zhijun Qu ,  Kenneth Wagers

发明人： Daniel M. Kinzer ,  Zhijun Qu ,  Kenneth Wagers

IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L21/337 ,  H01L21/332

CPC分类号： H01L29/7802 ,  H01L29/0634 ,  H01L29/1095 ,  H01L29/41766

摘要： A process to make a low voltage (under 200 volts) superjunction device employs spaced P type implants into the generally central depth region of an epitaxially formed N layer. The wafer is then placed in a diffusion furnace and the spaced implants are driven upward and downward by 4 to 8 microns to form spaced P pylons in an N type epitaxial body. MOSgated structures are then formed atop each of the P pedestals. The total P charge of each pedestal is at least partially matched to the total N charge of the surrounding epitaxial material. The initial implant may be sandwiched between two discrete epitaxial layers.

摘要翻译： 制造低电压（200伏特以下）超结装置的工艺在间隔成形的N层的大致中心的深度区域中使用间隔开的P型注入。 然后将晶片放置在扩散炉中，并且将间隔的植入物向上和向下驱动4至8微米，以在N型外延体中形成间隔的P型塔架。 然后在每个P基座上形成MOS结构。 每个基座的总P电荷至少部分地与周围外延材料的总N电荷匹配。 初始植入物可夹在两个离散外延层之间。

公开(公告)号：US06180981B2

公开(公告)日：2001-01-30

申请号：US09095349

申请日：1998-06-09

申请人： Daniel M. Kinzer ,  Kenneth Wagers

发明人： Daniel M. Kinzer ,  Kenneth Wagers

IPC分类号： H01L2976

CPC分类号： H01L29/7811 ,  H01L21/765 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/7802 ,  H01L29/7813 ,  H04B3/38

摘要： A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

摘要翻译： 描述了用于半导体器件的端接结构以及用于制造端接结构的工艺，其防止器件在器件周边破裂。 端接结构包括位于场氧化物区域的一部分顶部并且优选地覆盖基极区域的一部分的多晶硅场板。 场板也可以稍微延伸到场氧化物的边缘上以使场氧化物锥度平坦。 端接结构占据芯片的最小表面积，并且制造而不需要额外的掩模步骤。

公开(公告)号：US5940721A

公开(公告)日：1999-08-17

申请号：US725566

申请日：1996-10-03

申请人： Daniel M. Kinzer ,  Kenneth Wagers

发明人： Daniel M. Kinzer ,  Kenneth Wagers

IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L21/765 ,  H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417 ,  H01L21/76

CPC分类号： H01L29/402 ,  H01L21/765 ,  H01L29/1095 ,  H01L29/7811 ,  H01L29/0638 ,  H01L29/0696 ,  H01L29/41766

摘要： A termination structure for semiconductor devices and a process for fabricating the termination structure are described which prevent device breakdown at the peripheries of the device. The termination structure includes a polysilicon field plate located atop a portion of a field oxide region and which, preferably, overlays a portion of the base region. The field plate may also extend slightly over the edge of the field oxide to square off the field oxide taper. The termination structure occupies minimal surface area of the chip and is fabricated without requiring additional masking steps.

摘要翻译： 描述了用于半导体器件的端接结构以及用于制造端接结构的工艺，其防止器件在器件周边破裂。 端接结构包括位于场氧化物区域的一部分顶部并且优选地覆盖基极区域的一部分的多晶硅场板。 场板也可以稍微延伸到场氧化物的边缘上以使场氧化物锥度平坦。 端接结构占据芯片的最小表面积，并且制造而不需要额外的掩模步骤。