Method and apparatus to detect lesions of diabetic retinopathy in fundus images
    1.
    发明申请
    Method and apparatus to detect lesions of diabetic retinopathy in fundus images 审中-公开
    检测眼底图像中糖尿病视网膜病变的方法和装置

    公开(公告)号:US20140314288A1

    公开(公告)日:2014-10-23

    申请号:US14120027

    申请日:2014-04-16

    申请人: Keshab K. Parhi

    IPC分类号: G06T7/00 A61B3/12

    摘要: The present invention relates to the design and implementation of a three stage computer-aided screening system that analyzes fundus images with varying illumination and fields of view, and generates a severity grade for diabetic retinopathy (DR) using machine learning. In the first stage, bright and red regions are extracted from the fundus image. An optic disc has similar structural appearance as bright lesions, and the blood vessel regions have similar pixel intensity properties as the red lesions. Hence, the region corresponding to the optic disc is removed from the bright regions and the regions corresponding to the blood vessels are removed from the red regions. This leads to an image containing bright candidate regions and another image containing red candidate regions. In the second stage, the bright and red candidate regions are subjected to two-step hierarchical classification. In the first step, bright and red lesion regions are separated from non-lesion regions. In the second step, the classified bright lesion regions are further classified as hard exudates or cotton-wool spots, while the classified red lesion regions are further classified as hemorrhages and micro-aneurysms. In the third stage, the numbers of bright and red lesions per image are combined to generate a DR severity grade. Such a system will help in reducing the number of patients requiring manual assessment, and will be critical in prioritizing eye-care delivery measures for patients with highest DR severity.

    摘要翻译: 本发明涉及一种三阶段计算机辅助筛选系统的设计与实现,该系统利用不同的照明和视野分析眼底图像,并使用机器学习产生糖尿病视网膜病变(DR)的严重程度。 在第一阶段,从眼底图像中提取亮区和红区。 视盘具有与明亮病变相似的结构外观,并且血管区域具有与红色病变相似的像素强度特性。 因此,从明亮区域移除对应于视盘的区域,从红色区域移除对应于血管的区域。 这导致包含亮候选区域的图像和包含红色候选区域的另一图像。 在第二阶段,明亮和红色的候选区域进行两步分层分类。 在第一步,明亮和红色的病变区域与非病变区域分离。 在第二步,分类的明亮病变区域进一步分类为硬渗出物或棉绒斑点,而分类的红色病变区域进一步分类为出血和微动脉瘤。 在第三阶段,每个图像的明亮和红色损伤的数量被组合以产生DR严重性等级。 这样的系统将有助于减少需要手动评估的患者数量,并且对于对DR严重程度最高的患者进行眼保健服务措施的优先排序将是至关重要的。

    System and method for generating cyclic codes for error control in digital communications
    2.
    发明授权
    System and method for generating cyclic codes for error control in digital communications 有权
    用于在数字通信中生成用于错误控制的循环码的系统和方法

    公开(公告)号:US07539918B2

    公开(公告)日:2009-05-26

    申请号:US11067631

    申请日:2005-02-28

    申请人: Keshab K. Parhi

    发明人: Keshab K. Parhi

    IPC分类号: H03M13/00

    摘要: A K-bit information signal represented by a polynomial U(x) having a degree K−1 is received. The information signal is transformed to form a transformed information signal using a first transform represented by a polynomial G1(x) having a degree P. The transformed information signal is represented by a polynomial T(x) having a degree K+P−1. T(x) equals U(x)G1(x). An initial cyclic code represented by a polynomial R1(x) is generated for the transformed information signal using a second transform represented by a polynomial G2(x), where G2(x) has high-order leading-zero terms. R1(x) equals the remainder obtained by dividing T(x) by G2(x). The initial cyclic code is transformed to form a final cyclic code represented by a polynomial R2(x) using the first transform. R2(x) equals R1(x)/G1(x).

    摘要翻译: 接收由具有度K-1的多项式U(x)表示的K位信息信号。 使用由具有度P的多项式G1(x)表示的第一变换来变换信息信号以形成变换的信息信号。变换后的信息信号由具有K + P-1度的多项式T(x)表示。 T(x)等于U(x)G1(x)。 使用由多项式G2(x)表示的第二变换对变换后的信息信号生成由多项式R1(x)表示的初始循环码,其中G2(x)具有高阶前导零项。 R1(x)等于通过将T(x)除以G2(x)而获得的余数。 将初始循环码变换为使用第一变换由多项式R2(x)表示的最终循环码。 R2(x)等于R1(x)/ G1(x)。

    Area efficient parallel turbo decoding
    3.
    发明授权
    Area efficient parallel turbo decoding 有权
    区域效率平行turbo解码

    公开(公告)号:US07200799B2

    公开(公告)日:2007-04-03

    申请号:US10134684

    申请日:2002-04-30

    IPC分类号: H03M13/03

    摘要: Turbo decoders may have large decoding latency and low throughput due to iterative decoding. One way to increase the throughput and reduce the latency of turbo decoders is to use high speed decoding schemes. In particular, area-efficient parallel decoding schemes may be used to overcome the decoding latency and throughput associated with turbo decoders. In addition, hybrid parallel decoding schemes may be used in high-level parallelism implementations. Moreover, the area-efficient parallel decoding schemes introduce little or no performance degradation.

    摘要翻译: 由于迭代解码,Turbo解码器可能具有较大的解码延迟和低吞吐量。 提高turbo解码器吞吐量和降低延迟的一种方法是使用高速解码方案。 特别地,可以使用区域有效的并行解码方案来克服与turbo解码器相关联的解码延迟和吞吐量。 此外,混合并行解码方案可用于高级并行实现。 此外,区域有效的并行解码方案几乎没有或没有性能下降。

    LDPC code and encoder/decoder regarding same
    4.
    发明授权
    LDPC code and encoder/decoder regarding same 失效
    相关的LDPC码和编码器/解码器

    公开(公告)号:US07120856B2

    公开(公告)日:2006-10-10

    申请号:US10670018

    申请日:2003-09-24

    IPC分类号: G06F11/00 H03M13/00

    摘要: A joint code-encoder-decoder design approach and circuit architecture design for (3,k)-regular LDPC coding system implementation. The joint design process relies on a high girth (2,k)-regular LDPC code construction. The decoder realizes partly parallel decoding. The encoding scheme only contains multiplications between sparse matrices and vector and multiplication between a very small dense matrix and vector.

    摘要翻译: 用于(3,k)规则LDPC编码系统实现的联合编码 - 解码器设计方法和电路架构设计。 联合设计过程依赖于高周长(2,k)不规则的LDPC码构造。 解码器实现部分并行解码。 编码方案仅包含稀疏矩阵与向量之间的乘法以及非常小的密集矩阵和向量之间的乘法。

    Pipelined add-compare-select circuits and methods, and applications thereof
    5.
    发明授权
    Pipelined add-compare-select circuits and methods, and applications thereof 失效
    流水线加法比较选择电路和方法及其应用

    公开(公告)号:US07020831B2

    公开(公告)日:2006-03-28

    申请号:US10318250

    申请日:2002-12-13

    申请人: Keshab K. Parhi

    发明人: Keshab K. Parhi

    IPC分类号: H03M13/03

    摘要: Digital communications devices having high-speed add-compare-select circuits, and methods for designing the same. The add-compare-select circuits include logic segments separated by delay devices. The separation of the logic segments allows for pipelining of the add-compare-select processes and advantageous circuit retiming. The pipelining and advantageous circuit retiming permit the digital communications devices to be clocked at higher rates than similar digital communications devices having conventional add-compare-select circuits.

    摘要翻译: 具有高速加法比较选择电路的数字通信装置及其设计方法。 加法比较选择电路包括由延迟器件分离的逻辑段。 逻辑段的分离允许加法比较选择过程的流水线化和有利的电路重新定时。 流水线和有利的电路重新定时允许数字通信设备以比具有常规加法比较选择电路的类似数字通信设备更高的速率被计时。

    Low-error fixed-width modified booth multiplier
    6.
    发明授权
    Low-error fixed-width modified booth multiplier 失效
    低错误的固定宽度修改的展位乘数

    公开(公告)号:US06978426B2

    公开(公告)日:2005-12-20

    申请号:US10231179

    申请日:2002-08-30

    摘要: A low-error fixed-width multiplier receives a W-bit input and produces a W-bit product. In an embodiment, a multiplier (Y) is encoded using modified Booth coding. The encoded multiplier (Y) and a multiplicand (X) are processed together to generate partial products. The partial products are accumulated to generate a product (P). To compensate for the quantization error, Booth encoder outputs are used for the generation of error compensation bias. The truncated bits are divided into two groups, a major least significant bit group and a minor least significant bit group, depending upon their effects on the quantization error. Different error compensation methods are applied to each group.

    摘要翻译: 低误差固定宽度乘法器接收W位输入并产生W位乘积。 在一个实施例中,使用修改的布斯编码对乘法器(Y)进行编码。 编码乘法器(Y)和被乘数(X)被一起处理以产生部分乘积。 部分产品积累以产生产品(P)。 为了补偿量化误差,布斯编码器输出用于产生误差补偿偏置。 取决于它们对量化误差的影响,截断的比特被分成两组,主要的最低有效位组和次要的最低有效位组。 对每个组应用不同的误差补偿方法。

    Concurrent method for parallel Huffman compression coding and other variable length encoding and decoding
    7.
    发明授权
    Concurrent method for parallel Huffman compression coding and other variable length encoding and decoding 失效
    并行霍夫曼压缩编码和其他可变长度编码和解码的并发方法

    公开(公告)号:US06304197B1

    公开(公告)日:2001-10-16

    申请号:US09524834

    申请日:2000-03-14

    IPC分类号: H03M700

    CPC分类号: H03M7/425

    摘要: A method of processing multiple VLC data elements concurrently. A system realizing this method comprises a plurality of encoders under control and a plurality, typically like in number, of decoders under separate, but accorded control. Furthermore, a means of communication from the former to the latter is incorporated in which ordinal and temporal correspondence is established between particular encoders and particular decoders. Encoder control provides an ordered symbol assignment strategy across all encoders. Decoder control detects the encoder assignment strategy and applies it to the task of restoring the original output order among all decoder outputs.

    摘要翻译: 一种同时处理多个VLC数据元素的方法。 实现该方法的系统包括多个编码器,分别控制下,多个编码器,通常类似于多个解码器。 此外,还包括从前者到后者的通信手段,其中在特定编码器和特定解码器之间建立顺序和时间对应关系。 编码器控制提供所有编码器的有序符号分配策略。 解码器控制检测编码器分配策略,并将其应用于在所有解码器输出之间恢复原始输出顺序的任务。

    Fast and small serial variable length encoder with an optimally high rate for encoding including huffman encoding
    8.
    发明授权
    Fast and small serial variable length encoder with an optimally high rate for encoding including huffman encoding 失效
    快速和小型串行可变长度编码器,具有最佳的编码率,包括huffman编码

    公开(公告)号:US06271689B1

    公开(公告)日:2001-08-07

    申请号:US09526671

    申请日:2000-03-16

    IPC分类号: H03M740

    CPC分类号: G06T9/005 H03M7/40

    摘要: A processing means is described for the variable-length encoding of digital signals. The resultant serial encoder admits symbols at data-dependent intervals and progressively releases one bit of encoded output each cycle. The encoder comprises storage, a shifter and a simple pattern tester. Excepting the pattern tester, no arithmetic operations are involved. These three parts are arranged such that processing speed is limited by the greater of the retrieval delay from storage and the delay of the pattern tester. This arrangement is made feasible by an implicit means of codeword length storage. Optimal encoding rates for a serial encoder may hereby be obtained.

    摘要翻译: 描述了用于数字信号的可变长度编码的处理装置。 所得到的串行编码器以数据相关的间隔承认符号,并且每个周期逐渐释放一位编码的输出。 编码器包括存储器,移位器和简单模式测试器。 除了模式测试仪,不涉及算术运算。 这三个部分被布置成使得处理速度受到存储的检索延迟和图案测试器的延迟的较大限制。 这种安排通过码字长度存储的隐式方式变得可行。 因此可以获得串行编码器的最佳编码率。

    System for low complexity adaptive ECHO and NEXT cancellers
    9.
    发明授权
    System for low complexity adaptive ECHO and NEXT cancellers 有权
    低复杂度自适应ECHO和NEXT消除器的系统

    公开(公告)号:US08600039B2

    公开(公告)日:2013-12-03

    申请号:US12806539

    申请日:2010-08-16

    IPC分类号: H04M9/08

    CPC分类号: H04B3/23

    摘要: The present invention relates to design and implementation of low complexity adaptive echo and NEXT cancellers in multi-channel data transmission systems. In this invention, a highly efficient weight update scheme is proposed to reduce the computational cost of the weight update part in adaptive echo and NEXT cancellers. Based on the proposed scheme, the hardware complexity of the weight update part can be further reduced by applying the word-length reduction technique. The proposed scheme is general and suitable for real applications such as design of a low complexity transceiver in 10GBase-T. Different with prior work, this invention considers the complexity reduction in weight update part of the adaptive filters such that the overall complexity of these adaptive cancellers can be significantly reduced.

    摘要翻译: 本发明涉及多通道数据传输系统中低复杂度自适应回波和NEXT消除器的设计和实现。 在本发明中,提出了一种高效的加权更新方案,以减少自适应回波和NEXT消除器中权重更新部分的计算成本。 基于所提出的方案,可以通过应用字长缩减技术来进一步降低权重更新部分的硬件复杂度。 所提出的方案是一般的,适用于实际应用,例如在10GBase-T中设计低复杂度收发器。 与现有技术不同,本发明考虑了自适应滤波器的权重更新部分的复杂度降低,使得这些自适应消除器的整体复杂度可以显着降低。

    System for secure variable data rate transmission
    10.
    发明授权
    System for secure variable data rate transmission 失效
    用于安全可变数据速率传输的系统

    公开(公告)号:US08416948B2

    公开(公告)日:2013-04-09

    申请号:US12802306

    申请日:2010-06-04

    IPC分类号: H04L29/06

    摘要: Secure Variable Data Rate Transceivers and methods for implementing Secure Variable Data Rate are presented. An efficient and systematic method and circuit for implementing secure variable data rate transceivers are presented. The SVDR method is based on block ciphers. An index method is presented for minimizing transmission overhead. This allows SVDR to achieve higher security by using the full ciphermode stream.

    摘要翻译: 提出了安全可变数据速率收发器和实现安全可变数据速率的方法。 提出了一种实现安全可变数据速率收发器的高效,系统的方法和电路。 SVDR方法基于块密码。 提出了一种用于最小化传输开销的索引方法。 这允许SVDR通过使用完整的密码流实现更高的安全性。