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公开(公告)号：US07411274B2
公开(公告)日：2008-08-12
申请号：US10543166
申请日：2004-01-29
IPC分类号： H01L29/04
CPC分类号： H01L21/28167 , H01L21/02008 , H01L21/02027 , H01L21/02381 , H01L21/02428 , H01L21/02433 , H01L21/02532 , H01L21/02658 , H01L29/045
摘要： The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor substrate and a method for manufacturing the same, wherein the conventional RCA cleaning is employed without the use of special cleaning and the surface of the substrate is planarized at an atomic level to thereby decrease the surface roughness thereof without the use of the radical oxidation. The present invention provides a silicon semiconductor substrate comprising: a {110} plane or a plane inclined from a {110} plane as a main surface of the substrate; and steps arranged at an atomic level along a orientation on the main surface.
摘要翻译： 本发明是为了制造用于半导体集成电路器件的硅半导体衬底，在{100}面作为载流子迁移率，尤其是作为n型FET的载流子的电子迁移率中，作为 主表面，并提供硅半导体衬底及其制造方法，其中采用常规的RCA清洗而不使用特殊的清洁，并且基板的表面在原子级平坦化，从而降低其表面粗糙度 而不使用自由基氧化。 本发明提供了一种硅半导体衬底，其包括：{110}面或从{110}面倾斜作为衬底的主表面的平面; 以及沿着主表面沿<110>方向布置在原子水平的台阶。
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公开(公告)号：US07315064B2
公开(公告)日：2008-01-01
申请号：US11300503
申请日：2005-12-15
IPC分类号： H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L21/2007 , H01L21/76254 , H01L29/045
摘要： The present invention provides a bonded wafer, wherein at least a silicon single crystal layer is formed on a silicon single crystal wafer, the silicon single crystal layer has a crystal plane orientation of {110}, and the silicon single crystal wafer has a crystal plane orientation of {100}. The present invention also provides a method of producing a bonded wafer, wherein after at least a first silicon single crystal wafer having a crystal plane orientation of {110} and a second silicon single crystal wafer having a crystal plane orientation of {100} are bonded directly or bonded via an insulator film, the first silicon single crystal wafer is made into a thin film. Thereby, there can be provided a wafer possible to obtain a MIS device having good characteristics by utilizing a silicon single crystal wafer having the {110} plane.
摘要翻译： 本发明提供一种接合晶片，其中至少在单晶硅晶片上形成硅单晶层，所述硅单晶层的晶面取向为{110}，所述硅单晶晶片具有晶面 方向{100}。 本发明还提供一种制造接合晶片的方法，其中在至少具有{110}的晶面取向的第一硅单晶晶片和具有{100}晶面取向的第二硅单晶晶片之后， 通过绝缘膜直接或结合，将第一硅单晶晶片制成薄膜。 由此，通过利用具有{110}面的硅单晶晶片，可以提供可以获得具有良好特性的MIS器件的晶片。
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公开(公告)号：US07052974B2
公开(公告)日：2006-05-30
申请号：US10496379
申请日：2002-11-25
CPC分类号： H01L21/2007 , H01L21/76254 , H01L29/045
摘要： The present invention provides a bonded wafer, wherein at least a silicon single crystal layer is formed on a silicon single crystal wafer, the silicon single crystal layer has a crystal plane orientation of {110}, and the silicon single crystal wafer has a crystal plane orientation of {100}. The present invention also provides a method of producing a bonded wafer, wherein after at least a first silicon single crystal wafer having a crystal plane orientation of {110} and a second silicon single crystal wafer having a crystal plane orientation of {100} are bonded directly or bonded via an insulator film, the first silicon single crystal wafer is made into a thin film. Thereby, there can be provided a wafer possible to obtain a MIS device having good characteristics by utilizing a silicon single crystal wafer having the {110} plane.
摘要翻译： 本发明提供一种接合晶片，其中至少在单晶硅晶片上形成硅单晶层，所述硅单晶层的晶面取向为{110}，所述硅单晶晶片具有晶面 方向{100}。 本发明还提供一种制造接合晶片的方法，其中在至少具有{110}的晶面取向的第一硅单晶晶片和具有{100}晶面取向的第二硅单晶晶片之后， 通过绝缘膜直接或结合，将第一硅单晶晶片制成薄膜。 由此，通过利用具有{110}面的硅单晶晶片，可以提供可以获得具有良好特性的MIS器件的晶片。
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4.发明授权
公开(公告)号：US6131052A
公开(公告)日：2000-10-10
申请号：US789243
申请日：1997-01-28
申请人： Cozy Ban , Kiyoshi Demizu
发明人： Cozy Ban , Kiyoshi Demizu
IPC分类号： H01L21/02 , H01L21/66 , H01L21/677 , G06F19/00
CPC分类号： H01L22/20
摘要： A semiconductor manufacturing system capable of reducing time required for manufacture of semiconductors with effective use of waiting time of lots in storage equipment is provided. While a lot including a plurality of semiconductor wafers are stored in storage equipment, the semiconductor wafers in the lot are subjected to non-processing steps carried out by non-processing apparatuses such as measuring apparatuses, inspecting apparatuses, and contaminant removing apparatuses.
摘要翻译： 提供了能够有效利用存储设备中的批次的等待时间来减少制造半导体所需时间的半导体制造系统。 虽然包括多个半导体晶片的许多部分被存储在存储设备中，批次中的半导体晶片经受由诸如测量设备，检查设备和污染物去除设备的非处理设备执行的非处理步骤。
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公开(公告)号：US20060131553A1
公开(公告)日：2006-06-22
申请号：US10543166
申请日：2004-01-29
IPC分类号： H01L47/00
CPC分类号： H01L21/28167 , H01L21/02008 , H01L21/02027 , H01L21/02381 , H01L21/02428 , H01L21/02433 , H01L21/02532 , H01L21/02658 , H01L29/045
摘要： The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and provides a silicon semiconductor substrate and a method for manufacturing the same, wherein the conventional RCA cleaning is employed without the use of special cleaning and the surface of the substrate is planarized at an atomic level to thereby decrease the surface roughness thereof without the use of the radical oxidation. The present invention provides a silicon semiconductor substrate comprising: a {110} plane or a plane inclined from a {110} plane as a main surface of the substrate; and steps arranged at an atomic level along a orientation on the main surface.
摘要翻译： 本发明是为了制造用于半导体集成电路器件的硅半导体衬底，在{100}面作为载流子迁移率，尤其是作为n型FET的载流子的电子迁移率中，作为 主表面，并提供硅半导体衬底及其制造方法，其中采用常规的RCA清洗而不使用特殊的清洁，并且基板的表面在原子级平坦化，从而降低其表面粗糙度 而不使用自由基氧化。 本发明提供了一种硅半导体衬底，其包括：{110}面或从{110}面倾斜作为衬底的主表面的平面; 以及沿着主表面沿<110>方向布置在原子水平的台阶。
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公开(公告)号：US20050003648A1
公开(公告)日：2005-01-06
申请号：US10496379
申请日：2002-11-25
IPC分类号： H01L21/762 , H01L21/44
CPC分类号： H01L21/2007 , H01L21/76254 , H01L29/045
摘要： The present invention provides a bonded wafer, wherein at least a silicon single crystal layer is formed on a silicon single crystal wafer, the silicon single crystal layer has a crystal plane orientation of {110}, and the silicon single crystal wafer has a crystal plane orientation of {100}. The present invention also provides a method of producing a bonded wafer, wherein after at least a first silicon single crystal wafer having a crystal plane orientation of {110} and a second silicon single crystal wafer having a crystal plane orientation of {100} are bonded directly or bonded via an insulator film, the first silicon single crystal wafer is made into a thin film. Thereby, there can be provided a wafer possible to obtain a MIS device having good characteristics by utilizing a silicon single crystal wafer having the {110} plane.
摘要翻译： 本发明提供一种接合晶片，其中至少在单晶硅晶片上形成硅单晶层，所述硅单晶层的晶面取向为{110}，所述硅单晶晶片具有晶面 方向{100}。 本发明还提供一种制造接合晶片的方法，其中在至少具有{110}晶面取向的第一硅单晶晶片和具有{100}晶面取向的第二硅单晶晶片之后， 通过绝缘膜直接或结合，将第一硅单晶晶片制成薄膜。 由此，通过利用具有{110}面的硅单晶晶片，可以提供可以获得具有良好特性的MIS器件的晶片。
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7.发明授权公开(公告)号：US06787797B2
公开(公告)日：2004-09-07
申请号：US10019056
申请日：2002-04-22
申请人： Kiyoshi Demizu , Tadahiro Kato , Shigeyoshi Netsu
发明人： Kiyoshi Demizu , Tadahiro Kato , Shigeyoshi Netsu
IPC分类号： H01L2358
CPC分类号： H01L21/6875 , H01L21/6835 , H01L24/11 , H01L2224/13099 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01072 , H01L2924/01074 , H01L2924/01077 , H01L2924/01079 , H01L2924/01088 , H01L2924/30105
摘要： In order to improve the productivity or production yield of chips in the process for device fabrication, the present invention provides a wafer or an apparatus of process for fabricating semiconductor devices having the backside of the wafer or the surface of a wafer holding means adjusted so as to have a distribution in contact surface density between the surface of the wafer holding means and the backside of the wafer when the semiconductor wafer is held on the wafer holding means in the process for fabricating devices.
摘要翻译： 为了在设备制造过程中提高芯片的生产率或生产成本，本发明提供一种用于制造半导体器件的工艺的晶片或装置，该半导体器件具有晶片的背面或晶片保持装置的表面被调整为 在晶片保持装置的表面和晶片的背面之间具有接触表面密度的分布，当半导体晶片在制造器件的制造工艺中被保持在晶片保持装置上时。
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公开(公告)号：US20060099791A1
公开(公告)日：2006-05-11
申请号：US11300503
申请日：2005-12-15
IPC分类号： H01L21/44
CPC分类号： H01L21/2007 , H01L21/76254 , H01L29/045
摘要： The present invention provides a bonded wafer, wherein at least a silicon single crystal layer is formed on a silicon single crystal wafer, the silicon single crystal layer has a crystal plane orientation of {110}, and the silicon single crystal wafer has a crystal plane orientation of {100}. The present invention also provides a method of producing a bonded wafer, wherein after at least a first silicon single crystal wafer having a crystal plane orientation of {110} and a second silicon single crystal wafer having a crystal plane orientation of {100} are bonded directly or bonded via an insulator film, the first silicon single crystal wafer is made into a thin film. Thereby, there can be provided a wafer possible to obtain a MIS device having good characteristics by utilizing a silicon single crystal wafer having the {110} plane.
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