摘要:
A method of simultaneously forming a gallium arsenide p-i-n structure having p, i, and n regions, which includes heating to dissolve gallium arsenide in a solvent such as bismuth or gallium to form a saturated solution of gallium arsenide in the solvent, contacting the solution with a gaseous mixture, which mixture includes hydrogen, water vapor and products of reactions between the hydrogen and the water vapor with the solvent and with silicon dioxide, to form a contacted solution, coating a suitably selected substrate, such as a group III-V compound such as gallium arsenide, with the contacted solution, cooling the coated substrate to precipitate gallium arsenide from the contacted solution onto the substrate, and removing the substrate coated with a layer of gallium arsenide having a p-i-n structure which constitutes the product having an i region dopant concentration of less than about 10.sup.12 cm.sup.-3.
摘要:
A power GaAs Schottky diode with a chemically deposited Ni barrier having a reverse breakdown voltage of 140 V, a forward voltage drop at 50 A/cm.sup.2 of 0.7 V at 23.degree. C., 0.5 V at 150.degree. C. and 0.3 V at 250.degree. C. and having a reverse leakage current density at -50 V of 0.1 .mu.A/cm.sup.2 at 23.degree. C. and 1 mA/cm.sup.2 at 150.degree. C. The high-voltage high-speed power Schottky semiconductor device is made by chemically depositing a nickel barrier electrode on a semiconductor which includes gallium arsenide and then etching the device to create side portions which are treated and protected to create the Schottky device.
摘要翻译:具有化学沉积的Ni屏障的功率GaAs肖特基二极管具有140V的反向击穿电压,在50℃下在50A / cm 2下的正向压降为0.7V,在23℃下为0.7V,在150℃为0.5V,在250℃为0.3V 在-50℃时的反向泄漏电流密度为0.1μA/ cm 2,在23℃和150mA时为1mA / cm 2。高电压高速功率肖特基半导体器件通过化学 在包括砷化镓的半导体上沉积镍阻挡电极,然后蚀刻该器件以产生经过处理和保护以产生肖特基器件的侧部。
摘要:
A controlled capacitor system, which includes a capacitor element (C1) and a forward-biased diode element (D2) connected in series with the capacitor element (C1). The system is such that the diode element (D2) has a capacitance which is less than the capacitance of the capacitance of the capacitor element (C1) when the diode element (D2) is under zero bias. The capacitance of the diode element (D2) is controlled by varying the forward current (I2) through the diode (D2). The forward current (I2) acting to control the capacitance of the diode element is selected such that the capacitance of the diode element (D2) is smaller than the capacitance of the capacitor element (C1) when the current (I2) through the diode element (D2) is below a minimum value. The capacitance of the diode element (D2) is bigger than the capacitance of the capacitor element (C1) when the current (I2) through the diode element (D2) exceeds a maximum value.