Isochronous pipelined processor with deterministic control
    1.
    发明授权
    Isochronous pipelined processor with deterministic control 有权
    具有确定性控制的等时流水线处理器

    公开(公告)号:US07941645B1

    公开(公告)日:2011-05-10

    申请号:US10901887

    申请日:2004-07-28

    IPC分类号: G06F9/315

    CPC分类号: G06F9/3879 G06T1/20

    摘要: An isochronous processor includes a state register, a functional unit, a control module, and an activation unit. The state register includes an arm buffer and an active buffer. The functional unit performs a transformation operation on the data stream in response to an active value of the control parameter obtained from the active buffer. The control module updates the arm value of the control parameter in the arm buffer in response to control instructions. The activation unit detects a load event propagating with the data stream and transfers the parameter value from the arm buffer to the active buffer in response to the load event. During this transfer, the control module is inhibited from updating the arm buffer.

    摘要翻译: 同步处理器包括状态寄存器,功能单元,控制模块和激活单元。 状态寄存器包括一个臂缓冲器和一个主动缓冲区。 功能单元响应于从主动缓冲器获得的控制参数的活动值,对数据流执行变换操作。 响应于控制指令,控制模块更新臂缓冲器中的控制参数的臂值。 激活单元检测用数据流传播的负载事件,并响应于负载事件将参数值从臂缓冲器传送到活动缓冲器。 在此传输过程中,禁止控制模块更新臂缓冲器。

    System and method for controlling mode switches in hardware
    2.
    发明授权
    System and method for controlling mode switches in hardware 有权
    用于在硬件中控制模式开关的系统和方法

    公开(公告)号:US09292069B1

    公开(公告)日:2016-03-22

    申请号:US11945217

    申请日:2007-11-26

    IPC分类号: G06F17/00 G06F1/32

    摘要: One embodiment of the present invention sets forth a technique for controlling mode switches in hardware. The resource manager includes an “is mode possible” function that evaluates a given mode in conjunction with the limitations of the hardware to determine if the given mode is feasible. The display driver is configured to call this function to validate a proposed mode before generating commands specifying the state changes for the display heads. The display software interface hardware module within the GPU processes these commands and follows a standard sequence of steps to implement the mode switch. The steps may include interrupts to the resource manager to re-validate the proposed mode, again calling the “is mode possible” function, or perform operations that are not yet supported in the hardware. Advantageously, controlling mode switches in hardware enables less error-prone, more efficient, and more discerning mode switches relative to controlling mode switches in software.

    摘要翻译: 本发明的一个实施例提出了一种用于控制硬件中的模式切换的技术。 资源管理器包括一个“可能的模式”功能,其结合硬件的限制来评估给定的模式,以确定给定模式是否可行。 显示驱动器被配置为在生成指定显示器头的状态改变的命令之前调用该功能来验证所提出的模式。 GPU内的显示软件接口硬件模块处理这些命令,并按照标准的步骤顺序执行模式切换。 这些步骤可以包括资源管理器的中断以重新验证所提出的模式,再次调用“可能的模式”功能,或执行硬件中尚未支持的操作。 有利地,与软件中的控制模式切换相比,硬件中的控制模式切换使得相对于控制模式切换更少的易错,更有效和更挑剔的模式切换。

    Active raster composition and error checking in hardware
    4.
    发明授权
    Active raster composition and error checking in hardware 有权
    硬件中的活动栅格组合和错误检查

    公开(公告)号:US07999815B1

    公开(公告)日:2011-08-16

    申请号:US11936035

    申请日:2007-11-06

    摘要: One embodiment of the present invention sets forth a system for computing and error checking configuration parameters related to raster image generation within a graphics processing unit. Input parameters are validated by a hardware-based error checking engine. A hardware-based pre-calculation engine uses validated input parameters to compute additional private configuration parameters used by the raster image generation circuitry within a graphics processing unit.

    摘要翻译: 本发明的一个实施例提出了一种用于计算和错误检查与图形处理单元内的光栅图像生成有关的配置参数的系统。 输入参数由基于硬件的错误检查引擎验证。 基于硬件的预计算引擎使用经验证的输入参数来计算图形处理单元内光栅图像生成电路使用的附加私有配置参数。

    Work Based Clock Management for Display Sub-System
    5.
    发明申请
    Work Based Clock Management for Display Sub-System 有权
    显示子系统的基于工作的时钟管理

    公开(公告)号:US20070250728A1

    公开(公告)日:2007-10-25

    申请号:US11690093

    申请日:2007-03-22

    IPC分类号: G06F1/04 G06F1/00

    摘要: A system and method for enabling or disabling clocks to one or more portions of hardware circuitry, for example a display sub-system of a personal computer. A processor generates a command or data to a first circuit configured to perform a function based at least on the command or data. A clock generator selectively supplies clocks to the first circuit and a second circuit configured to perform a second function. A software interface circuit coupled to the processor and the clock generator autonomously determines based at least on the command or data whether the second circuit will perform the second function or be idle in an upcoming period and disables one or more of the clocks to the second circuit if the second circuit will be idle in the upcoming period.

    摘要翻译: 一种用于启用或禁用时钟到硬件电路的一个或多个部分的系统和方法,例如个人计算机的显示子系统。 处理器生成命令或数据至配置为至少基于命令或数据执行功能的第一电路。 时钟发生器选择性地向第一电路提供时钟,并且配置成执行第二功能的第二电路。 耦合到处理器和时钟发生器的软件接口电路至少基于命令或数据自主地确定第二电路是否将执行第二功能或在即将到来的时段中处于空闲状态,并且将一个或多个时钟禁用到第二电路 如果第二个电路在即将到来的时间内将处于空闲状态。

    System and method for controlling mode switches in hardware
    6.
    发明授权
    System and method for controlling mode switches in hardware 有权
    用于在硬件中控制模式开关的系统和方法

    公开(公告)号:US08234488B1

    公开(公告)日:2012-07-31

    申请号:US11945218

    申请日:2007-11-26

    IPC分类号: G06F1/24 G06F9/00

    摘要: One embodiment of the present invention sets forth a technique for controlling mode switches in hardware. The resource manager includes an “is mode possible” function that evaluates a given mode in conjunction with the limitations of the hardware to determine if the given mode is feasible. The display driver is configured to call this function to validate a proposed mode before generating commands specifying the state changes for the display heads. The display software interface hardware module within the GPU processes these commands and follows a standard sequence of steps to implement the mode switch. The steps may include interrupts to the resource manager to re-validate the proposed mode, again calling the “is mode possible” function, or perform operations that are not yet supported in the hardware. Advantageously, controlling mode switches in hardware enables less error-prone, more efficient, and more discerning mode switches relative to controlling mode switches in software.

    摘要翻译: 本发明的一个实施例提出了一种用于控制硬件中的模式切换的技术。 资源管理器包括一个“可能的模式”功能,其结合硬件的限制来评估给定的模式,以确定给定模式是否可行。 显示驱动器被配置为在生成指定显示器头的状态改变的命令之前调用该功能来验证所提出的模式。 GPU内的显示软件接口硬件模块处理这些命令,并按照标准的步骤顺序执行模式切换。 这些步骤可以包括资源管理器的中断以重新验证所提出的模式,再次调用“可能的模式”功能,或执行硬件中尚未支持的操作。 有利地,与软件中的控制模式切换相比,硬件中的控制模式切换使得相对于控制模式切换更少的易错,更有效和更挑剔的模式切换。

    Active raster composition and error checking in hardware
    7.
    发明授权
    Active raster composition and error checking in hardware 有权
    硬件中的活动栅格组合和错误检查

    公开(公告)号:US08134567B1

    公开(公告)日:2012-03-13

    申请号:US11936038

    申请日:2007-11-06

    IPC分类号: G06T1/00 G06F13/00 G09G5/36

    摘要: One embodiment of the present invention sets forth a system for computing and error checking configuration parameters related to raster image generation within a graphics processing unit. Input parameters are validated by a hardware-based error checking engine. A hardware-based pre-calculation engine uses validated input parameters to compute additional private configuration parameters used by the raster image generation circuitry within a graphics processing unit.

    摘要翻译: 本发明的一个实施例提出了一种用于计算和错误检查与图形处理单元内的光栅图像生成有关的配置参数的系统。 输入参数由基于硬件的错误检查引擎验证。 基于硬件的预计算引擎使用经验证的输入参数来计算图形处理单元内光栅图像生成电路使用的附加私有配置参数。

    Work based clock management for display sub-system
    8.
    发明授权
    Work based clock management for display sub-system 有权
    用于显示子系统的基于工作的时钟管理

    公开(公告)号:US07882380B2

    公开(公告)日:2011-02-01

    申请号:US11690093

    申请日:2007-03-22

    IPC分类号: G06F1/00

    摘要: A system and method for enabling or disabling clocks to one or more portions of hardware circuitry, for example a display sub-system of a personal computer. A processor generates a command or data to a first circuit configured to perform a function based at least on the command or data. A clock generator selectively supplies clocks to the first circuit and a second circuit configured to perform a second function. A software interface circuit coupled to the processor and the clock generator autonomously determines based at least on the command or data whether the second circuit will perform the second function or be idle in an upcoming period and disables one or more of the clocks to the second circuit if the second circuit will be idle in the upcoming period.

    摘要翻译: 一种用于启用或禁用时钟到硬件电路的一个或多个部分的系统和方法,例如个人计算机的显示子系统。 处理器生成命令或数据至配置为至少基于命令或数据执行功能的第一电路。 时钟发生器选择性地向第一电路提供时钟,并且配置成执行第二功能的第二电路。 耦合到处理器和时钟发生器的软件接口电路至少基于命令或数据自主地确定第二电路是否将执行第二功能或在即将到来的时段中处于空闲状态,并且将一个或多个时钟禁用到第二电路 如果第二个电路在即将到来的时间内将处于空闲状态。