公开(公告)号：US20100244195A1

公开(公告)日：2010-09-30

申请号：US12412702

申请日：2009-03-27

Applicant: Limin Lin ,  Bin Xie ,  Shu Yuan

Inventor： Limin Lin ,  Bin Xie ,  Shu Yuan

IPC: H01L29/20 ,  H01L21/302

CPC classification number: H01L33/0079

Abstract: A host substrate and method of making a host substrate for nitride based thin-film semiconductor devices are provided. According to one embodiment, the method includes the steps of providing a silicon layer; etching a pattern of holes in the silicon layer; plating the silicon layer with copper to fill the holes etched in the silicon layer; bonding the silicon layer to a gallium nitride (GaN) layer, the GaN layer attached to a sapphire substrate; and removing the sapphire substrate. The host substrate is configured to address the coefficient of thermal expansion (CTE) mismatch problem and reduce the amount of stress resulting from such CTE mismatch. A combination of metal and semiconductor materials provide for the desired thermal and electrical conductivity while providing for subsequent dicing and incorporation of the finished semiconductor devices into other circuits.

Abstract translation: 提供了一种主衬底和制造用于氮化物基薄膜半导体器件的主衬底的方法。 根据一个实施例，该方法包括提供硅层的步骤; 蚀刻硅层中的孔的图案; 用铜电镀硅层以填充蚀刻在硅层中的孔; 将所述硅层与氮化镓（GaN）层接合，所述GaN层附着在蓝宝石衬底上; 并去除蓝宝石衬底。 主机基板被配置为解决热膨胀系数（CTE）失配问题，并减少由这种CTE失配引起的应力的量。 金属和半导体材料的组合提供期望的热导电性和导电性，同时提供随后的切割和将成品半导体器件并入其它电路中。

公开(公告)号：US20110169023A1

公开(公告)日：2011-07-14

申请号：US13074807

申请日：2011-03-29

Applicant: Limin Lin ,  HungShen Chu ,  Ka Wah Chan

Inventor： Limin Lin ,  HungShen Chu ,  Ka Wah Chan

IPC: H01L33/02

CPC classification number: H01L33/0095 ,  H01L21/78 ,  H01L33/38

Abstract: A method of making quasi-vertical light emitting devices includes growing semiconductor layers on a growth substrate and etching the semiconductor layers to produce device isolation trenches forming separable semiconductor devices and holes. Blind holes are drilled in the substrate at the location of each of the holes in the semiconductor layers. The drilling of the blind holes defines blind hole walls and a blind hole end in each of the blind holes. N-semiconductor metal is deposited in each of the blind holes. An n-electrode contact is formed in each of the blind holes by plating each of the blind holes with an n-electrode metal connected to the n-semiconductor metal. The substrate is thinned to expose the n-electrode metal as an n-electrode. Bonding metal is deposited to the n-electrode for packaging.

Abstract translation: 制造准垂直发光器件的方法包括在生长衬底上生长半导体层并蚀刻半导体层以产生形成可分离半导体器件和孔的器件隔离沟槽。 在半导体层中的每个孔的位置处在基板上钻出盲孔。 盲孔的钻孔在每个盲孔中限定盲孔壁和盲孔端。 在每个盲孔中沉积N-半导体金属。 通过用与n型半导体金属连接的n电极金属电镀每个盲孔，在每个盲孔中形成n电极接触。 将衬底减薄以暴露作为n电极的n电极金属。 粘合金属沉积到n电极以进行包装。

公开(公告)号：US20110284906A1

公开(公告)日：2011-11-24

申请号：US13192444

申请日：2011-07-27

Applicant: Limin LIN ,  Xiangfeng SHAO

Inventor： Limin LIN ,  Xiangfeng SHAO

IPC: H01L33/30 ,  H01L33/62 ,  H01L33/48 ,  H01L33/60

CPC classification number: H01L33/0079 ,  H01L33/44 ,  H01L33/647 ,  H01L2933/0016

Abstract: A method of fabricating a compound semiconductor vertical LED is provided. A first growth substrate capable of supporting compound semiconductor epitaxial growth thereon is provided. One or more epitaxial layers of compound semiconductor material such as GaN or InGaN is formed on the first growth substrate to create a portion of a vertical light emitting diode. Plural trenches are formed in the compound semiconductor material. Passivating material is deposited in one or more trenches. A hard material is at least partially deposited in the trenches and optionally on portions of the compound semiconductor material. The hard material has a hardness greater than the hardness of the compound semiconductor. A metal layer is deposited over the compound semiconductor material followed by metal planarization. A new host substrate is bonded to the metal layer and the first growth substrate is removed. Dicing is used to form individual LED devices.

Abstract translation: 提供了一种制造化合物半导体垂直LED的方法。 提供了能够在其上支持化合物半导体外延生长的第一生长衬底。 化合物半导体材料如GaN或InGaN的一个或多个外延层形成在第一生长衬底上以形成垂直发光二极管的一部分。 在化合物半导体材料中形成多个沟槽。 钝化材料沉积在一个或多个沟槽中。 硬质材料至少部分地沉积在沟槽中以及任选地在化合物半导体材料的部分上。 硬质材料的硬度大于化合物半导体的硬度。 金属层沉积在化合物半导体材料上，接着进行金属平面化。 将新的主体衬底结合到金属层，并且去除第一生长衬底。 Dicing用于形成单个LED器件。

公开(公告)号：US20100244082A1

公开(公告)日：2010-09-30

申请号：US12415103

申请日：2009-03-31

Applicant: Limin Lin ,  HungShen Chu ,  Ka Wah Chan

Inventor： Limin Lin ,  HungShen Chu ,  Ka Wah Chan

IPC: H01L33/00 ,  H01L21/78

CPC classification number: H01L33/0095 ,  H01L21/78 ,  H01L33/38

Abstract: A quasi-vertical light emitting device is provided. According to one embodiment of the present invention, the quasi-vertical light emitting diode includes a sapphire substrate; a plurality of semiconductor layers grown on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer; a plurality of holes etched in the plurality of semiconductor layers, each of the plurality of holes etched to the sapphire substrate, and a plurality of sapphire holes in the sapphire substrate, each of the plurality of holes aligned with one of the plurality of sapphire holes to form hole walls, the hole walls and bottom deposited with an n-metal and each of the plurality of holes filled with another metal to form a n-electrode contact; an n-mesa in the active layer and the p-GaN layer, the n-mesa deposited with an n-metal and a passivation layer grown over the n-metal; and a p-metal layer deposited on the p-GaN layer, and a p-electrode bonded to the p-metal.

Abstract translation: 提供准垂直发光装置。 根据本发明的一个实施例，准垂直发光二极管包括蓝宝石衬底; 在蓝宝石衬底上生长的多个半导体层，所述多个半导体层包括n-GaN层，有源层和p-GaN层; 蚀刻在多个半导体层中的多个孔，蚀刻到蓝宝石衬底的多个孔中的每一个以及蓝宝石衬底中的多个蓝宝石孔，多个孔中的每一个与多个蓝宝石孔中的一个对准 形成孔壁，孔壁和底部沉积有n金属，并且多个孔中的每一个填充有另一种金属以形成n电极接触; 有源层和p-GaN层中的n面，沉积有n金属的n面和在n金属上生长的钝化层; 以及沉积在p-GaN层上的p金属层和与p-金属键合的p-电极。

公开(公告)号：US08222064B2

公开(公告)日：2012-07-17

申请号：US13192444

申请日：2011-07-27

Applicant: Limin Lin ,  Xiangfeng Shao

Inventor： Limin Lin ,  Xiangfeng Shao

IPC: H01L21/00 ,  H01L21/46 ,  H01L21/30 ,  H01L29/18 ,  H01L27/15 ,  H01L33/00

CPC classification number: H01L33/0079 ,  H01L33/44 ,  H01L33/647 ,  H01L2933/0016

Abstract: A method of fabricating a compound semiconductor vertical LED is provided. A first growth substrate capable of supporting compound semiconductor epitaxial growth thereon is provided. One or more epitaxial layers of compound semiconductor material such as GaN or InGaN is formed on the first growth substrate to create a portion of a vertical light emitting diode. Plural trenches are formed in the compound semiconductor material. Passivating material is deposited in one or more trenches. A hard material is at least partially deposited in the trenches and optionally on portions of the compound semiconductor material. The hard material has a hardness greater than the hardness of the compound semiconductor. A metal layer is deposited over the compound semiconductor material followed by metal planarization. A new host substrate is bonded to the metal layer and the first growth substrate is removed. Dicing is used to form individual LED devices.

Abstract translation: 提供了一种制造化合物半导体垂直LED的方法。 提供了能够在其上支持化合物半导体外延生长的第一生长衬底。 化合物半导体材料如GaN或InGaN的一个或多个外延层形成在第一生长衬底上以形成垂直发光二极管的一部分。 在化合物半导体材料中形成多个沟槽。 钝化材料沉积在一个或多个沟槽中。 硬质材料至少部分地沉积在沟槽中以及任选地在化合物半导体材料的部分上。 硬质材料的硬度大于化合物半导体的硬度。 金属层沉积在化合物半导体材料上，接着进行金属平面化。 将新的主体衬底结合到金属层，并且去除第一生长衬底。 Dicing用于形成单个LED器件。

公开(公告)号：US08211721B2

公开(公告)日：2012-07-03

申请号：US13074807

申请日：2011-03-29

Applicant: Limin Lin ,  Hung Shen Chu ,  Ka Wah Chan

Inventor： Limin Lin ,  Hung Shen Chu ,  Ka Wah Chan

IPC: H01L21/00

CPC classification number: H01L33/0095 ,  H01L21/78 ,  H01L33/38

Abstract: A method of making quasi-vertical light emitting devices includes growing semiconductor layers on a growth substrate and etching the semiconductor layers to produce device isolation trenches forming separable semiconductor devices and holes. Blind holes are drilled in the substrate at the location of each of the holes in the semiconductor layers. The drilling of the blind holes defines blind hole walls and a blind hole end in each of the blind holes. N-semiconductor metal is deposited in each of the blind holes. An n-electrode contact is formed in each of the blind holes by plating each of the blind holes with an n-electrode metal connected to the n-semiconductor metal. The substrate is thinned to expose the n-electrode metal as an n-electrode. Bonding metal is deposited to the n-electrode for packaging.

Abstract translation: 制造准垂直发光器件的方法包括在生长衬底上生长半导体层并蚀刻半导体层以产生形成可分离半导体器件和孔的器件隔离沟槽。 在半导体层中的每个孔的位置处在基板上钻出盲孔。 盲孔的钻孔在每个盲孔中限定盲孔壁和盲孔端。 在每个盲孔中沉积N-半导体金属。 通过用与n型半导体金属连接的n电极金属电镀每个盲孔，在每个盲孔中形成n电极接触。 将衬底减薄以暴露作为n电极的n电极金属。 粘合金属沉积到n电极以进行包装。

公开(公告)号：US07939847B2

公开(公告)日：2011-05-10

申请号：US12415103

申请日：2009-03-31

Applicant: Limin Lin ,  Hung Shen Chu ,  Ka Wah Chan

Inventor： Limin Lin ,  Hung Shen Chu ,  Ka Wah Chan

IPC: H01L33/00

CPC classification number: H01L33/0095 ,  H01L21/78 ,  H01L33/38

Abstract: A quasi-vertical light emitting device is provided. According to one embodiment of the present invention, the quasi-vertical light emitting diode includes a sapphire substrate; a plurality of semiconductor layers grown on the sapphire substrate, the plurality of semiconductor layers including an n-GaN layer, an active layer, and a p-GaN layer; a plurality of holes etched in the plurality of semiconductor layers, each of the plurality of holes etched to the sapphire substrate, and a plurality of sapphire holes in the sapphire substrate, each of the plurality of holes aligned with one of the plurality of sapphire holes to form hole walls, the hole walls and bottom deposited with an n-metal and each of the plurality of holes filled with another metal to form a n-electrode contact; an n-mesa in the active layer and the p-GaN layer, the n-mesa deposited with an n-metal and a passivation layer grown over the n-metal; and a p-metal layer deposited on the p-GaN layer, and a p-electrode bonded to the p-metal.

Abstract translation: 提供准垂直发光装置。 根据本发明的一个实施例，准垂直发光二极管包括蓝宝石衬底; 在蓝宝石衬底上生长的多个半导体层，所述多个半导体层包括n-GaN层，有源层和p-GaN层; 蚀刻在多个半导体层中的多个孔，蚀刻到蓝宝石衬底的多个孔中的每一个以及蓝宝石衬底中的多个蓝宝石孔，多个孔中的每一个与多个蓝宝石孔中的一个对准 形成孔壁，孔壁和底部沉积有n金属，并且多个孔中的每一个填充有另一种金属以形成n电极接触; 有源层和p-GaN层中的n面，沉积有n金属的n面和在n金属上生长的钝化层; 以及沉积在p-GaN层上的p金属层和与p-金属键合的p-电极。