公开(公告)号：US20030186621A1

公开(公告)日：2003-10-02

申请号：US10346513

申请日：2003-01-15

申请人： MOSEL VITELIC, INC., A Taiwanese Corporation

发明人： Chun-Te Lin ,  Shan-An Liu ,  Chung-Ru Wu ,  Ming-Hsien Lu

IPC分类号： B24B049/00 ,  B24B001/00

CPC分类号： B24B37/013 ,  B24B37/042 ,  H01L21/31053 ,  H01L21/3212

摘要： The present invention relates to a method for determining rapidly and accurately the polishing time of a chemical mechanical polishing process for polishing target wafers to avoid any problems of under-polishing or over-polishing. An aspect of the present invention is directed to a method for determining a chemical mechanical polishing time for removing a target polishing thickness H from an uneven surface of a target wafer. The method comprises polishing a control wafer by a chemical mechanical polishing to obtain a progressive relationship of polishing thickness and respective polishing time therefor. A first polishing time T1 is determined for removing a first thickness H1 from the target wafer, in which the first thickness H1 with substantially the uneven surface removed is smaller than the target polishing thickness H of the target wafer to be removed. In some embodiments, the first polishing time T1 is determined by polishing the target wafer to remove the first thickness H1 by chemical mechanical polishing. The method comprises calculating an image polishing thickness H1null to be removed from the control wafer with respect to the first polishing time T1 according to the progressive relationship of the polishing thickness and respective polishing time for the control wafer. A second polishing thickness H2null(HnullH1) is added to the image polishing thickness H1null to obtain an equivalent polishing thickness H1null for the control wafer. A target polishing time is determined for removing the target polishing thickness H from the target wafer by interpolating the progressive relationship of the polishing thickness and respective polishing time for the control wafer based on the equivalent polishing thickness Hnull.

摘要翻译： 本发明涉及一种用于快速准确地确定用于抛光目标晶片的化学机械抛光工艺的抛光时间的方法，以避免抛光不足或过度抛光的任何问题。 本发明的一个方面涉及一种用于确定从目标晶片的不平坦表面去除目标抛光厚度H的化学机械抛光时间的方法。 该方法包括通过化学机械抛光抛光控制晶片以获得抛光厚度和相应的抛光时间的渐进关系。 确定第一抛光时间T1，用于从目标晶片去除第一厚度H1，其中去除了基本上不平坦表面的第一厚度H1小于要去除的目标晶片的目标抛光厚度H. 在一些实施例中，通过抛光目标晶片以通过化学机械抛光除去第一厚度H1来确定第一抛光时间T1。 该方法包括根据抛光厚度与控制晶片的相应抛光时间的渐进关系，相对于第一抛光时间T1计算要从控制晶片移除的图像抛光厚度H1'。 将第二研磨厚度H2 =（H-H1）添加到图像研磨厚度H1'，以获得用于控制晶片的等效抛光厚度H1'。 通过根据等效抛光厚度H'插入控制晶片的研磨厚度和各抛光时间的渐进关系来确定从目标晶片去除目标抛光厚度H的目标抛光时间。

公开(公告)号：US20020142573A1

公开(公告)日：2002-10-03

申请号：US10113705

申请日：2002-03-27

申请人： MOSEL VITELIC, INC. A Taiwanese Corporation

发明人： Zhih-Sheng Yang ,  Chung-Yan Cheng ,  Ying-Yan Huang ,  Jason C.S. Chu

IPC分类号： H01L021/44

CPC分类号： H01L21/7685 ,  H01L21/2855 ,  H01L21/32051

摘要： Embodiments of the present invention are directed to a metallization process for reducing the stress existing between the AlnullCu layer and the titanium nitride (TiN) layer, and solving the galvanic problem. The process does so by cooling the wafer in the vacuum apparatus where the metallization process is performed after formation of the AlnullCu layer and before the formation of the TiN layer. In accordance with an aspect of the present invention, a metallization process comprises placing a wafer in an AlnullCu sputtering chamber to form an AlnullCu layer on the wafer, and transferring the wafer to a titanium nitride sputtering chamber. An inert gas is introduced into the titanium nitride sputtering chamber to cool the wafer. A titanium nitride layer is formed on the AlnullCu layer of the wafer in the titanium nitride sputtering layer after cooling the wafer.

摘要翻译： 本发明的实施例涉及一种用于减少存在于Al-Cu层和氮化钛（TiN）层之间的应力并且解决电偶问题的金属化方法。 该方法通过冷却在形成Al-Cu层之后和形成TiN层之前进行金属化处理的真空装置中的晶片。 根据本发明的一个方面，金属化工艺包括将晶片放置在Al-Cu溅射室中以在晶片上形成Al-Cu层，并将晶片转移到氮化钛溅射室。 将惰性气体引入到氮化钛溅射室中以冷却晶片。 在冷却晶片之后，在氮化钛溅射层中的晶片的Al-Cu层上形成氮化钛层。

公开(公告)号：US20040031772A1

公开(公告)日：2004-02-19

申请号：US10219094

申请日：2002-08-13

申请人： MOSEL VITELIC, INC. A Taiwanese Corporation

发明人： Chieh-Ju Chang ,  Tsai-Sen Lin ,  Chon-Shin Jou ,  Yifu Chung

IPC分类号： B32B001/08 ,  B44C001/22 ,  H01L021/311

CPC分类号： H01L21/28238 ,  C23C8/02 ,  C23C8/10 ,  C23C8/80 ,  H01L21/28211 ,  H01L21/3144 ,  H01L21/7621 ,  H01L29/518

摘要： Embodiments of the present invention relate to a method for preventing gate oxide thinning in a recess LOCOS process. A method of forming a gate oxide on a substrate comprises providing a substrate having thereon a plurality of trenches having gate oxides formed therein, wherein the plurality of trenches are separated by a patterned pad oxide and a patterned silicon nitride layer disposed thereon and used to form the plurality of trenches. The patterned silicon nitride layer and the patterned pad oxide layer are removed to expose a surface of the substrate as an active area of the semiconductor device. An ion drive-in to the active area on the substrate is performed by directing a flow of oxygen and nitrogen toward the substrate at a predetermined temperature and with a sufficient amount of oxygen to at least substantially prevent silicon nitride from forming on the field oxide regions. The method further comprises forming a sacrificial oxide layer on the active area, removing the sacrificial oxide layer to expose the active area, and forming a gate oxide layer on the active area. The affinity for oxygen with silicon is higher than that for nitrogen with silicon. As a result, oxygen can be used to prevent or reduce silicon nitride formation on the field oxide regions.

摘要翻译： 本发明的实施例涉及一种用于在凹槽LOCOS工艺中防止栅极氧化物稀化的方法。 在衬底上形成栅极氧化物的方法包括提供其上具有形成有栅极氧化物的多个沟槽的衬底，其中所述多个沟槽由图案化衬垫氧化物和布置在其上的图案化氮化硅层分离，并用于形成 多个沟槽。 图案化的氮化硅层和图案化的衬垫氧化物层被去除以暴露衬底的表面作为半导体器件的有效区域。 在衬底上的有源区域中的离子驱动通过在预定温度和足够量的氧气下引导氧和氮流向衬底来进行，以至少基本上防止在场氧化物区域上形成氮化硅 。 该方法还包括在有源区上形成牺牲氧化物层，去除牺牲氧化物层以暴露有源区，以及在有源区上形成栅极氧化物层。 硅与氧的亲和力高于硅与氮的亲和力。 结果，可以使用氧来防止或减少场氧化物区域上的氮化硅形成。

公开(公告)号：US20040055141A1

公开(公告)日：2004-03-25

申请号：US10671814

申请日：2003-09-26

申请人： MOSEL VITELIC, INC. A Taiwanese Corporation

发明人： Hsiu-Chieh Chen ,  Hsiao-Ping Hsieh ,  Wen-Kan Hu ,  Wen-Chin Wu

IPC分类号： H02K015/14 ,  B23P019/00

CPC分类号： H01L21/67046 ,  Y10T29/49009 ,  Y10T29/49826 ,  Y10T29/49895 ,  Y10T29/53143 ,  Y10T29/53961

摘要： The present invention relates to an auxiliary tool for assembling a scrubber which includes a motor, a shaft rotatably coupled to and extending through the motor, a shaft pin detachably connected to the shaft, and a disk coupled to the shaft and having a notch located relative to the shaft pin at a predetermined angle with respect to a longitudinal axis of the shaft when properly assembled. In specific embodiments, the auxiliary tool comprises a tool body configured to at least partially receive the motor, the shaft pin, the disk, and the notch of the disk. The tool body includes a first recess configured to at least partially receive the shaft pin and a protrusion configured to be at least partially received into the notch of the disk. The first recess and the protrusion are arranged at the predetermined angle to position the notch of the disk and the shaft pin of the scrubber for proper assembly at the predetermined angle with respect to the longitudinal axis of the shaft.

摘要翻译： 本发明涉及一种用于组装洗涤器的辅助工具，该辅助工具包括电动机，可旋转地联接到电动机上并延伸穿过电动机的轴，可拆卸地连接到轴的轴销和联接到轴的盘，并且具有位于相对 在正确组装时相对于轴的纵向轴线以预定角度延伸到轴销。 在具体实施例中，辅助工具包括被配置为至少部分地接收电动机，轴销，盘和盘的凹口的工具主体。 所述工具主体包括第一凹部，所述第一凹部被构造成至少部分地容纳所述轴销和突出部，所述突起被配置为至少部分地容纳在所述盘的凹口中。 第一凹部和突出部以预定角度布置，以将盘的凹口和洗涤器的轴销定位成相对于轴的纵向轴线以预定角度正确组装。

公开(公告)号：US20020166255A1

公开(公告)日：2002-11-14

申请号：US10087096

申请日：2002-03-01

申请人： MOSEL VITELIC, INC., A Taiwanese Corporation

发明人： Yu Chih Lin ,  Chih Hsin Tsai ,  Ming Hua Shih ,  Shih Kai Pao

IPC分类号： F26B017/24 ,  F26B017/30 ,  F26B019/00 ,  F26B013/26

CPC分类号： H01L21/67259 ,  F26B5/08

摘要： Embodiments of the present invention relate to an apparatus for spin drying substrates in a spin dryer tank. A spin dryer cover is movable between a closed position to close an opening of the spin dryer tank and an open position to open the spin dryer tank, and a cylinder is coupled with the spin dryer cover. The cylinder is movable in a first operation to move the spin dryer cover to the open position and movable in a second operation to move the spin dryer cover to the closed position. A system for sensing the position of the spin dryer cover comprises a cylinder sensor configured to sense the first operation and the second operation of the cylinder. A cover sensor is configured to sense the position of the spin dryer cover. A logic circuit is configured to output a cover opening signal indicating that the spin dryer cover is in the open position when the cylinder sensor senses the first operation of the cylinder and the cover sensor senses that the spin dryer cover is in the open position.

摘要翻译： 本发明的实施例涉及一种用于在旋转干燥箱中旋转基材的设备。 旋转干燥器盖可以在关闭位置以关闭旋转干燥器箱的开口和打开位置以打开旋转干燥箱之间移动，并且圆筒与旋转干燥器盖结合。 气缸可在第一操作中移动，以将旋转干衣机盖移动到打开位置，并且可在第二操作中移动以使旋转干衣机盖移动到关闭位置。 用于感测旋转干燥器盖的位置的系统包括被配置为感测气缸的第一操作和第二操作的气缸传感器。 盖传感器构造成感测旋转干燥器盖的位置。 逻辑电路被配置为当气缸传感器检测到气缸的第一操作并且盖传感器感测到旋转干衣机盖处于打开位置时，输出指示旋转干衣机盖处于打开位置的盖打开信号。

公开(公告)号：US20030060033A1

公开(公告)日：2003-03-27

申请号：US10219092

申请日：2002-08-13

申请人： MOSEL VITELIC, INC. A Taiwanese Corporation

发明人： Chiao-Shun Chuang ,  Chien-Ping Chang ,  Mao-Song Tseng ,  Hsin-Huang Hsieh

IPC分类号： H01L021/4763 ,  H01L021/3205 ,  H01L021/38 ,  H01L021/22

CPC分类号： H01L21/28167

摘要： Embodiments of the present invention relate to processes utilized in the manufacturing of a semiconductor device having transistors to achieve high uniformity of threshold voltages. The invention does so by ensuring high uniformity of impurity concentration in the substrate. In one embodiment, a method for manufacturing a semiconductor device having transistors with high uniformity of threshold voltages comprises providing a substrate and a source of impurities, and disposing the substrate and the source of impurities in a first oxygen gas at a first initial temperature and heated to a first target temperature at a first temperature rate to drive the impurities into the substrate. The first initial temperature is sufficiently low to prevent the oxygen from diffusing into the substrate. The substrate is disposed in a second oxygen gas at a second initial temperature and heated to a second target temperature at a second rate to form an oxide layer on the substrate. The second rate is high enough for rapid formation of the oxide layer on the substrate so as to prevent the impurities driven into the substrate from diffusing out from the substrate.

摘要翻译： 本发明的实施例涉及用于制造具有晶体管以实现阈值电压的高均匀性的半导体器件的工艺。 本发明通过确保衬底中杂质浓度的高均匀性来实现。 在一个实施例中，制造具有高阈值电压均匀性的晶体管的半导体器件的方法包括提供衬底和杂质源，并将衬底和杂质源置于第一初始温度的第一氧气中并加热 以第一温度速率升至第一目标温度以驱动杂质进入基板。 第一初始温度足够低以防止氧扩散到基底中。 将衬底在第二初始温度下设置在第二氧气中，并以第二速率加热至第二目标温度，以在衬底上形成氧化物层。 第二速率足够高以快速形成衬底上的氧化物层，以防止驱动到衬底中的杂质从衬底扩散出来。

公开(公告)号：US20020137343A1

公开(公告)日：2002-09-26

申请号：US10105507

申请日：2002-03-26

申请人： MOSEL VITELIC, INC. A Taiwanese Corporation

发明人： Chuan-Yi Wang ,  Tsai-Sen Lin ,  Chon-Shin Jou ,  Chi-Ping Chung

IPC分类号： H01L021/302 ,  H01L021/461

CPC分类号： G01N1/32 ,  G01N1/4044 ,  G01N2033/0095

摘要： Embodiments of the present invention relate to implanting arsenic into a wafer to quickly detect if there is metal contamination, such as iron, aluminum, or manganese, on the wafer. In accordance with an aspect of the present invention, a method for detecting metal contamination of a silicon chip comprises implanting arsenic ions into the silicon chip, and etching the silicon chip with a chemical etching solution. The existence of any metal contamination is detected by observing occurrence of silicon pits on the silicon chip caused by reaction between the arsenic ions and the metal contamination and etching with the chemical etching solution.

摘要翻译： 本发明的实施例涉及将砷注入晶片​​以快速检测在晶片上是否存在诸如铁，铝或锰的金属污染物。 根据本发明的一个方面，一种用于检测硅芯片的金属污染的方法包括将砷离子注入到硅芯片中，并用化学蚀刻溶液蚀刻硅芯片。 通过观察由砷离子和金属污染物之间的反应引起的硅芯片上的硅坑的发生以及用化学蚀刻溶液的蚀刻来检测是否存在任何金属污染。