公开(公告)号：US08127157B2

公开(公告)日：2012-02-28

申请号：US12460476

申请日：2009-07-20

申请人： Mark Bilak

发明人： Mark Bilak

IPC分类号： G06F1/00 ,  G01D3/00

CPC分类号： G06F1/3284 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/159 ,  Y02D10/172

摘要： A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms. Alternatively, the invention enables adaptive adjustment of the operating frequency of an integrated circuit. The invention enables system designers to adaptively optimize either system performance or power consumption on a part-by-part basis in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.

摘要翻译： 响应于测试器到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，自适应地调整集成电路的工作电压的方法和装置。 集成电路的最小工作电压在集成电路的外部测试期间或内置自检期间确定。 最小工作电压传输到可变电压调节器，用于设置稳压器的输出。 稳压器的输出为集成电路提供工作电压。 该技术可以逐个部分地调整集成电路的工作电压，从而通过根据测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化来调整工作电压，从而实现功耗优化 或可靠性破坏机制。 或者，本发明实现了集成电路的工作频率的自适应调整。 本发明使得系统设计者可以响应于测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，逐部分地自适应地优化系统性能或功耗。

公开(公告)号：US20070156931A1

公开(公告)日：2007-07-05

申请号：US11680371

申请日：2007-02-28

申请人： Mark BILAK ,  Robert BUNCE ,  Steven PARKER ,  Brian SCHUH

发明人： Mark BILAK ,  Robert BUNCE ,  Steven PARKER ,  Brian SCHUH

IPC分类号： G06F5/00

CPC分类号： H04L49/9047 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/90

摘要： An apparatus and method for dynamically allocating memory between inbound and outbound paths of a networking protocol handler so as to optimize the ratio of a given amount of memory between the inbound and outbound buffers is presented. Dedicated but sharable buffer memory is provided for both the inbound and outbound processors of a computer network. Buffer memory is managed so as to dynamically alter what portion of memory is used to receive and store incoming data packets or to transmit outgoing data packets. Use of the present invention reduces throttling of data rate transmissions and other memory access bottlenecks associated with conventional fixed-memory network systems.

摘要翻译： 提出了一种用于在网络协议处理器的入站和出站路径之间动态分配存储器以便优化入站和出站缓冲器之间的给定量的存储器的比率的装置和方法。 为计算机网络的入站和出站处理器提供专用但可共享的缓冲存储器。 管理缓冲存储器，以便动态地改变用于接收和存储输入数据分组或传输输出数据分组的内存部分。 使用本发明减少了与常规固定存储器网络系统相关联的数据速率传输和其他存储器访问瓶颈的限制。

公开(公告)号：US20060028258A1

公开(公告)日：2006-02-09

申请号：US10912610

申请日：2004-08-05

申请人： Mark Bilak ,  Thomas Fleischman

发明人： Mark Bilak ,  Thomas Fleischman

IPC分类号： H03K3/12

CPC分类号： G11C23/00

摘要： Micro-electromechanical switches (MEMS) are configured to form a data storage latch to reduce power consumption, to reduce the space used in an integrated circuit, and to improve performance of the integrated circuit. MEMS are implemented at the wiring layer connected to an integrated circuit and coupled to form a storage latch.

摘要翻译： 微机电开关（MEMS）被配置为形成数据存储锁存器以降低功耗，减少集成电路中使用的空间，并提高集成电路的性能。 在连接到集成电路的布线层上实现MEMS，并且耦合以形成存储锁存器。

公开(公告)号：US20050261927A1

公开(公告)日：2005-11-24

申请号：US10853381

申请日：2004-05-24

申请人： Mark Bilak ,  Gary Dauser ,  Karen Madden ,  Kris Srikrishnan

发明人： Mark Bilak ,  Gary Dauser ,  Karen Madden ,  Kris Srikrishnan

IPC分类号： G06Q40/00 ,  G06F17/60

CPC分类号： G06Q40/00 ,  G06Q40/06 ,  G06Q50/184

摘要： A method, system, and machine-readable medium having instructions recorded thereon are provided for valuing a current intellectual property (IP) transaction. The method includes providing IP data, financial data, and license data, the license data representing transactions other than the current IP transaction. A license value is obtained by referring to the license data. The value of the current IP transaction is determined by adjusting the license value in relation to the IP data, the financial data, and at least one of: i) trend data and ii) at least one quality factor.

摘要翻译： 提供了其上记录有指令的方法，系统和机器可读介质，用于对当前知识产权（IP）交易进行估价。 该方法包括提供IP数据，财务数据和许可证数据，表示当前IP事务以外的事务的许可证数据。 通过参考许可证数据获得许可证值。 当前IP交易的价值通过调整与IP数据，财务数据以及以下中的至少一个相关的许可证值来确定：i）趋势数据和ii）至少一个品质因子。

公开(公告)号：US20090287944A1

公开(公告)日：2009-11-19

申请号：US12460476

申请日：2009-07-20

申请人： Mark Bilak

发明人： Mark Bilak

IPC分类号： G06F1/00 ,  G01R15/00

CPC分类号： G06F1/3284 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/159 ,  Y02D10/172

摘要： A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms. Alternatively, the invention enables adaptive adjustment of the operating frequency of an integrated circuit. The invention enables system designers to adaptively optimize either system performance or power consumption on a part-by-part basis in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.

摘要翻译： 响应于测试器到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，自适应地调整集成电路的工作电压的方法和装置。 集成电路的最小工作电压在集成电路的外部测试期间或内置自检期间确定。 最小工作电压传输到可变电压调节器，用于设置稳压器的输出。 稳压器的输出为集成电路提供工作电压。 该技术可以逐个部分地调整集成电路的工作电压，从而通过根据测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化来调整工作电压，从而实现功耗优化 或可靠性破坏机制。 或者，本发明实现了集成电路的工作频率的自适应调整。 本发明使得系统设计者可以响应于测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，逐部分地自适应地优化系统性能或功耗。

公开(公告)号：US07577859B2

公开(公告)日：2009-08-18

申请号：US10708270

申请日：2004-02-20

申请人： Mark Bilak

发明人： Mark Bilak

IPC分类号： G06F1/00 ,  G06F1/32 ,  G01R15/00

CPC分类号： G06F1/3284 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/159 ,  Y02D10/172

摘要： A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms. Alternatively, the invention enables adaptive adjustment of the operating frequency of an integrated circuit. The invention enables system designers to adaptively optimize either system performance or power consumption on a part-by-part basis in response to tester-to system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.

摘要翻译： 响应于测试器到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，自适应地调整集成电路的工作电压的方法和装置。 集成电路的最小工作电压在集成电路的外部测试期间或内置自检期间确定。 最小工作电压传输到可变电压调节器，用于设置稳压器的输出。 稳压器的输出为集成电路提供工作电压。 该技术可以逐个部分地调整集成电路的工作电压，从而通过根据测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化来调整工作电压，从而实现功耗优化 或可靠性破坏机制。 或者，本发明实现了集成电路的工作频率的自适应调整。 本发明使得系统设计人员可以响应于测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，逐一地自适应地优化系统性能或功耗。

公开(公告)号：US20060066370A1

公开(公告)日：2006-03-30

申请号：US10711693

申请日：2004-09-30

申请人： Mark Bilak ,  Thomas Fleischman

发明人： Mark Bilak ,  Thomas Fleischman

IPC分类号： H03K3/356

CPC分类号： H03K19/0008

摘要： The invention provides micro-electromechanical switch (MEM) based designs for reducing the power consumption of logic blocks (e.g., latches) by isolating the logic blocks when they are non-operational. A power reduction circuit in accordance with the present invention comprises a logic block and at least one micro-electromechanical (MEM) switch for selectively disabling the logic block. MEM switches are provided for selectively: disconnecting the logic block from power; disconnecting the logic block from ground; providing a bypass line around the logic block; disconnecting an output of the logic block; and/or disconnecting an input of the logic block.

摘要翻译： 本发明提供了基于微机电开关（MEM）的设计，用于通过在逻辑块不可操作时隔离逻辑块来降低逻辑块（例如，锁存器）的功耗。 根据本发明的功率降低电路包括逻辑块和用于选择性地禁用逻辑块的至少一个微机电（MEM）开关。 提供MEM开关用于选择性地：断开逻辑块电源; 断开逻辑块与地线的连接; 在逻辑块周围提供旁路线; 断开逻辑块的输出; 和/或断开逻辑块的输入。

公开(公告)号：US20050188230A1

公开(公告)日：2005-08-25

申请号：US10708270

申请日：2004-02-20

申请人： Mark Bilak

发明人： Mark Bilak

IPC分类号： G06F1/26 ,  G06F1/32

CPC分类号： G06F1/3284 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/159 ,  Y02D10/172

摘要： A method and apparatus for adaptively adjusting the operating voltage of an integrated circuit in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations, or reliability wearout mechanisms. The minimum operating voltage of an integrated circuit is determined either during external testing of the integrated circuit or during built-in-self-testing. The minimum operating voltage is transmitted to a variable voltage regulator where it is used to set the output of the regulator. The output of the regulator supplies the integrated circuit with its operating voltage. This technique enables tailoring of the operating voltage of integrated circuits on a part-by-part basis which results in power consumption optimization by adapting operating voltage in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms. Alternatively, the invention enables adaptive adjustment of the operating frequency of an integrated circuit. The invention enables system designers to adaptively optimize either system performance or power consumption on a part-by-part basis in response to tester-to-system variations, worst-case testing techniques, process variations, temperature variations or reliability wearout mechanisms.

摘要翻译： 响应于测试器到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，自适应地调整集成电路的工作电压的方法和装置。 集成电路的最小工作电压在集成电路的外部测试期间或内置自检期间确定。 最小工作电压传输到可变电压调节器，用于设置稳压器的输出。 稳压器的输出为集成电路提供工作电压。 该技术可以逐个部分地调整集成电路的工作电压，从而通过根据测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化来调整工作电压，从而实现功耗优化 或可靠性破坏机制。 或者，本发明实现了集成电路的工作频率的自适应调整。 本发明使得系统设计者可以响应于测试仪到系统的变化，最坏的测试技术，工艺变化，温度变化或可靠性损耗机制，逐部分地自适应地优化系统性能或功耗。