公开(公告)号：US08638583B2

公开(公告)日：2014-01-28

申请号：US13621078

申请日：2012-09-15

申请人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

发明人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

IPC分类号： G11C15/00 ,  G11C15/04 ,  G11C7/14 ,  G11C7/06 ,  G11C7/12 ,  G11C7/22

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

摘要翻译： 包括存储数据位的单位单元的多个比特的条目耦合到匹配线。 匹配线具有一个充电电流，该充电电流的限制电流值小于在一个条目中以一位未命中状态流动的匹配线电流，但大于在一个条目中以全位匹配状态流动的匹配线电流 。 匹配线的预充电电压电平被限制为电源电压的一半或更小的电压电平。 可以减少内容可寻址存储器的搜索周期中的功耗，并且可以提高搜索操作速度。

公开(公告)号：US20120170344A1

公开(公告)日：2012-07-05

申请号：US13419217

申请日：2012-03-13

申请人： Naoya WATANABE ,  Isamu HAYASHI ,  Teruhiko AMANO ,  Fukashi MORISHITA ,  Kenji YOSHINAGA ,  Mihoko AKIYAMA ,  Shinya MIYAZAKI ,  Masakazu ISHIBASHI ,  Katsumi DOSAKA

发明人： Naoya WATANABE ,  Isamu HAYASHI ,  Teruhiko AMANO ,  Fukashi MORISHITA ,  Kenji YOSHINAGA ,  Mihoko AKIYAMA ,  Shinya MIYAZAKI ,  Masakazu ISHIBASHI ,  Katsumi DOSAKA

IPC分类号： G11C15/00

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

摘要翻译： 包括存储数据位的单位单元的多个比特的条目耦合到匹配线。 匹配线具有一个充电电流，该充电电流的限制电流值小于在一个条目中以一位未命中状态流动的匹配线电流，但大于在一个条目中以全位匹配状态流动的匹配线电流 。 匹配线的预充电电压电平被限制为电源电压的一半或更小的电压电平。 可以减少内容可寻址存储器的搜索周期中的功耗，并且可以提高搜索操作速度。

公开(公告)号：US07518112B2

公开(公告)日：2009-04-14

申请号：US11656478

申请日：2007-01-23

申请人： Takashi Matsumoto ,  Satoshi Hanazawa ,  Toshihiko Moriwaki ,  Masakazu Ishibashi ,  Naruaki Kiriki

发明人： Takashi Matsumoto ,  Satoshi Hanazawa ,  Toshihiko Moriwaki ,  Masakazu Ishibashi ,  Naruaki Kiriki

IPC分类号： G01J5/06

CPC分类号： G01T1/247 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014

摘要： A radiation detection circuit having a multi-channel input used for radiation measurement and capable of canceling cross-talk noise generated from a logic circuit for controlling a channel and enabling low noise radiation measurement easily and precisely. The radiation detection circuit also generates an inverted signal for each of input/output signals needed for controlling its logic and cancels a noise charge generated by coupled capacity between a bonding wire (analog input side in IC package) for connecting its output to another radiation detection circuit and a bonding wire of each of input/output signals of the logic control circuit by generating an inverted noise charge with coupled capacity between the inverted signal and its output when in logic controlling, thereby suppressing the cross-talk noise generated by each of its input/output signals.

摘要翻译： 一种辐射检测电路，具有用于辐射测量的多通道输入，并且能够抵消从用于控制通道的逻辑电路产生的串扰噪声并且能够容易且精确地实现低噪声辐射测量。 辐射检测电路还为控制其逻辑所需的每个输入/输出信号产生反相信号，并且消除由接合线（IC封装中的模拟输入端）之间的耦合容量产生的噪声电荷，以将其输出连接到另一辐射检测 电路和逻辑控制电路的每个输入/输出信号的接合线，通过在逻辑控制中产生反相信号与其输出之间的耦合容量的反相噪声电荷，从而抑制由其中的每一个产生的串扰噪声 输入/输出信号。

公开(公告)号：US07119917B2

公开(公告)日：2006-10-10

申请号：US10222351

申请日：2002-08-15

申请人： Masakazu Ishibashi

发明人： Masakazu Ishibashi

IPC分类号： G06F15/00 ,  H04N15/00 ,  H04N1/00

CPC分类号： H04N1/00923 ,  H04N1/32128 ,  H04N1/32411 ,  H04N2201/3205 ,  H04N2201/3215 ,  H04N2201/3216 ,  H04N2201/3232 ,  H04N2201/3278

摘要： A facsimile server device that can append TTI information to facsimile data in various manners. The facsimile server device is connected to a plurality of data processing devices such as client PCs over LAN, and is adapted to send facsimile data to a designated remote communication device upon instructions from a data processing device. The facsimile server device includes CPU, a keyboard or mouse and a display to set TTI information. TTI information may contain information about recipient, sender, time and page. The facsimile server device stores the TTI in RAM. TTI information in a certain form may also be provided from a data processing device. The TTI information programmed in the facsimile server device or the TTI information sent from the data processing device is given priority and appended to the facsimile data.

公开(公告)号：US08310852B2

公开(公告)日：2012-11-13

申请号：US13419217

申请日：2012-03-13

申请人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

发明人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

IPC分类号： G11C15/00 ,  G11C15/04 ,  G11C7/14 ,  G11C7/06 ,  G11C7/12 ,  G11C7/22

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

公开(公告)号：US20070228279A1

公开(公告)日：2007-10-04

申请号：US11656478

申请日：2007-01-23

申请人： Takashi Matsumoto ,  Satoshi Hanazawa ,  Toshihiko Moriwaki ,  Masakazu Ishibashi ,  Naruaki Kiriki

发明人： Takashi Matsumoto ,  Satoshi Hanazawa ,  Toshihiko Moriwaki ,  Masakazu Ishibashi ,  Naruaki Kiriki

IPC分类号： G01T1/00

CPC分类号： G01T1/247 ,  H01L2224/05554 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/00014

摘要： A radiation detection circuit having a multi-channel input used for radiation measurement and capable of canceling cross-talk noise generated from a logic circuit for controlling a channel and enabling low noise radiation measurement easily and precisely. The radiation detection circuit also generates an inverted signal for each of input/output signals needed for controlling its logic and cancels a noise charge generated by coupled capacity between a bonding wire (analog input side in IC package) for connecting its output to another radiation detection circuit and a bonding wire of each of input/output signals of the logic control circuit by generating an inverted noise charge with coupled capacity between the inverted signal and its output when in logic controlling, thereby suppressing the cross-talk noise generated by each of its input/output signals.

摘要翻译： 一种辐射检测电路，具有用于辐射测量的多通道输入，并且能够抵消从用于控制通道的逻辑电路产生的串扰噪声并且能够容易且精确地实现低噪声辐射测量。 辐射检测电路还为控制其逻辑所需的每个输入/输出信号产生反相信号，并且消除由接合线（IC封装中的模拟输入端）之间的耦合容量产生的噪声电荷，以将其输出连接到另一辐射检测 电路和逻辑控制电路的每个输入/输出信号的接合线，通过在逻辑控制中产生反相信号与其输出之间的耦合容量的反相噪声电荷，从而抑制由其中的每一个产生的串扰噪声 输入/输出信号。

公开(公告)号：US06374291B1

公开(公告)日：2002-04-16

申请号：US08871136

申请日：1997-06-06

申请人： Masakazu Ishibashi ,  Hiroyuki Yasumoto

发明人： Masakazu Ishibashi ,  Hiroyuki Yasumoto

IPC分类号： G06F1516

CPC分类号： H04N1/00214 ,  H04L51/24 ,  H04N1/00204 ,  H04N1/00212 ,  H04N1/00217 ,  H04N1/32416 ,  H04N1/32438 ,  H04N2201/0015 ,  H04N2201/002 ,  H04N2201/0067 ,  H04N2201/0068 ,  H04N2201/3205 ,  H04N2201/3214 ,  H04N2201/3215 ,  H04N2201/3216 ,  H04N2201/3218 ,  H04N2201/3219 ,  H04N2201/3278

摘要： A communication terminal device of the present invention is provided with both facsimile communication function and electronic mail transmission/reception function. At the transmission side, scanned image data is coded by MH, MR method and the like, converted to text data, then edited according to electronic mail format for transmitting it as an electronic mail to computer network like internet. The transmission side also transmits by facsimile (by a circuit switching method) a transmission notification indicating transmission of the electronic mail and a signal indicating reception of the electronic mail. After receiving the signal requesting reception of the electronic mail, the receiving side receives the electronic mail from the computer network, converts it into image data and prints the image data out by facsimile.

摘要翻译： 本发明的通信终端装置具有传真通信功能和电子邮件发送/接收功能。 在发送侧，通过MH，MR方法等对扫描图像数据进行编码，转换为文本数据，然后根据电子邮件格式进行编辑，将其作为电子邮件发送到诸如互联网的计算机网络。 发送侧还通过传真（通过电路交换方法）发送指示电子邮件的发送的发送通知和指示电子邮件的接收的信号。 在接收到请求接收电子邮件的信号之后，接收侧从计算机网络接收电子邮件，将其转换为图像数据，并通过传真打印图像数据。

公开(公告)号：US20130010513A1

公开(公告)日：2013-01-10

申请号：US13621078

申请日：2012-09-15

申请人： Naoya WATANABE ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

发明人： Naoya WATANABE ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

IPC分类号： G11C15/00

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

公开(公告)号：US08164934B2

公开(公告)日：2012-04-24

申请号：US12720561

申请日：2010-03-09

申请人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

发明人： Naoya Watanabe ,  Isamu Hayashi ,  Teruhiko Amano ,  Fukashi Morishita ,  Kenji Yoshinaga ,  Mihoko Akiyama ,  Shinya Miyazaki ,  Masakazu Ishibashi ,  Katsumi Dosaka

IPC分类号： G11C15/00 ,  G11C15/04 ,  G11C7/14 ,  G11C7/06 ,  G11C7/12 ,  G11C7/22

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry. A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

摘要翻译： 包括存储数据位的单位单元的多个比特的条目耦合到匹配线。 匹配线具有一个充电电流，该充电电流的限制电流值小于在一个条目中以一位未命中状态流动的匹配线电流，但大于在一个条目中以全位匹配状态流动的匹配线电流 。 匹配线的预充电电压电平被限制为电源电压的一半或更小的电压电平。 可以减少内容可寻址存储器的搜索周期中的功耗，并且可以增加搜索操作速度。

公开(公告)号：US20100165691A1

公开(公告)日：2010-07-01

申请号：US12720561

申请日：2010-03-09

申请人： Naoya WATANABE ,  Isamu HAYASHI ,  Teruhiko AMANO ,  Fukashi MORISHITA ,  Kenji YOSHINAGA ,  Mihoko AKIYAMA ,  Shinya MIYAZAKI ,  Masakazu ISHIBASHI ,  Katsumi DOSAKA

发明人： Naoya WATANABE ,  Isamu HAYASHI ,  Teruhiko AMANO ,  Fukashi MORISHITA ,  Kenji YOSHINAGA ,  Mihoko AKIYAMA ,  Shinya MIYAZAKI ,  Masakazu ISHIBASHI ,  Katsumi DOSAKA

IPC分类号： G11C15/00 ,  G11C7/00 ,  G11C7/02

CPC分类号： G11C15/043 ,  G11C7/06 ,  G11C7/12 ,  G11C7/14 ,  G11C7/22 ,  G11C15/04 ,  G11C15/046

摘要： An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a match line current flowing in a one-bit miss state in one entry, but larger than a match line current flowing in an all-bit match state in one entry.A precharge voltage level of a match line is restricted to a voltage level of half a power supply voltage or smaller. Power consumption in a search cycle of a content addressable memory can be reduced, and a search operation speed can be increased.

摘要翻译： 包括存储数据位的单位单元的多个比特的条目耦合到匹配线。 匹配线具有一个充电电流，该充电电流的限制电流值小于在一个条目中以一位未命中状态流动的匹配线电流，但大于在一个条目中以全位匹配状态流动的匹配线电流 。 匹配线的预充电电压电平被限制为电源电压的一半或更小的电压电平。 可以减少内容可寻址存储器的搜索周期中的功耗，并且可以提高搜索操作速度。