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公开(公告)号：US08906819B2
公开(公告)日：2014-12-09
申请号：US12650037
申请日：2009-12-30
申请人： Michael D. Cooper , Nagesh Patel
发明人： Michael D. Cooper , Nagesh Patel
IPC分类号： B01J38/48 , B01J38/60 , B01J38/62 , B01J38/50 , B01J23/92 , B01J38/64 , B01J38/66 , B01J23/22 , B01J23/30
摘要： This invention is directed to a method for removing calcium material from a substrate or catalytic converter. In particular, this invention is directed to a method for removing calcium material, particularly in the form of calcium-containing fly ash, from a substrate using a partially protonated or non-protonated polycarboxylic acid treatment material.
摘要翻译： 本发明涉及从基材或催化转化器中除去钙物质的方法。 特别地，本发明涉及使用部分质子化或非质子化的多元羧酸处理材料从基材除去钙材料，特别是含钙飞灰的形式的方法。
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公开(公告)号：US07078931B2
公开(公告)日：2006-07-18
申请号：US11013663
申请日：2004-12-16
申请人： Michael D. Cooper
发明人： Michael D. Cooper
IPC分类号： H03K19/003
CPC分类号： H03K17/164
摘要： A GTL output structure having an active charging and discharging stage that actively restores internal nodes for slew rate control without the need to wait for a slow rise and fall RC time constant is disclosed herein. The novel GTL output structure includes an input stage connected to an RC network for providing slew rate control. The output stage connects between the RC network and a feedback network. The feedback network in includes an active charging stage for providing a charging current to the gate of the at least one transistor for a period of time to the value of a power supply rail and wherein the feedback network includes an active discharging stage for providing a discharge current from the gate of the at least one transistor to ground.
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3.发明授权Quasi-complementary BiCMOS circuit with enhanced pull down transistor clamp 失效具有增强型下拉晶体管钳位的准互补BiCMOS电路
公开(公告)号：US5886542A
公开(公告)日：1999-03-23
申请号：US108356
申请日：1993-08-18
申请人： Michael D. Cooper
发明人： Michael D. Cooper
IPC分类号： H03K19/0944 , H03K19/082 , H03K17/16
CPC分类号： H03K19/09448
摘要： A quasi-complementary BICMOS circuit (46) having a clamp circuit that automatically discharges the base-collector of a pull down bipolar transistor (16) when the transistor's (16) collector voltage equalizes its base voltage. The action is immediate and does not depend on the performance of a feedback circuit to provide the timing of the arrival of the clamp signal. The clamp circuit reduces the amount of shallow saturation and quickly discharges shallow saturation after the pull down transition. The degree of shallow saturation is controllable by size selection of the clamp transistor (48). The clamp circuit also discharges the transistor's (16) base voltage to ground potential.
摘要翻译： 具有钳位电路的准互补BICMOS电路（46），当晶体管（16）的集电极电压平均其基极电压时，该钳位电路自动地对下拉双极晶体管（16）的基极集电极放电。 该动作是立即的，并且不依赖于反馈电路的性能来提供钳位信号到达的定时。 钳位电路减少浅饱和量，并在下拉转换后快速放电浅饱和。 通过钳位晶体管（48）的尺寸选择来控制浅饱和度。 钳位电路还将晶体管（16）的基极电压放电到地电位。
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公开(公告)号：US5602976A
公开(公告)日：1997-02-11
申请号：US21190
申请日：1993-02-23
申请人： Michael D. Cooper , Michael L. Hodgson , Patrick S.-H. Ong , James G. Sandman, Jr. , Paul D. Rovner , Edward R. Fiala
发明人： Michael D. Cooper , Michael L. Hodgson , Patrick S.-H. Ong , James G. Sandman, Jr. , Paul D. Rovner , Edward R. Fiala
CPC分类号： G06K15/00 , G06K15/1848 , G06K15/1849 , G06K15/1856 , G06K15/1861 , G06K15/1865 , G06K2215/0002 , G06K2215/0011 , G06K2215/0014 , G06K2215/0065 , G06K2215/0071
摘要： A page printer uses alternative internal representations for the print data in each of multiple lateral strips that make up the page. Page description language input is converted to an intermediate display list format that is sorted into display commands associated with each strip. If during input the display list representation of the data fills the memory allotted to its storage, one or more of the strips is converted from display list format to raster format and compressed using a lossless compression algorithm. If storage of compressed strips subsequently exceeds available memory, raster data is further compressed using a lossy compression algorithm. Additional display list commands are rasterized by decompressing the compressed strips, processing the new commands and recompressing the data using lossless or lossy compression as required. If the display list does not overflow memory during input, the complete strips are rasterized and compressed one at a time in the order in which they will be printed. The rasterizing time is stored. Should memory overflow at any point in the process, then the rasterizing times for the remaining strips are determined without storing the raster output. A decision can then be made for each strip to rasterize it to the print engine on the fly, precompute and store it as lossless compressed raster data, or revert to a lossy-compressed precomputed version.
摘要翻译： 页面打印机在构成页面的多个横向条带中的每一个中使用打印数据的替代内部表示。 页面描述语言输入被转换为与每个条带相关联的显示命令分类的中间显示列表格式。 如果在输入期间，数据的显示列表表示填充分配给其存储器的存储器，则一个或多个条带从显示列表格式转换为光栅格式，并使用无损压缩算法进行压缩。 如果压缩条的存储随后超过可用存储器，则使用有损压缩算法进一步压缩栅格数据。 通过解压缩压缩条，处理新命令并根据需要使用无损或有损压缩来重新压缩数据，可以对其他显示列表命令进行光栅化。 如果显示列表在输入期间不溢出存储器，则完整的条带将按照打印顺序一次一个地进行光栅化和压缩。 存储光栅化时间。 如果存储器在处理过程中的任何一点溢出，则在不存储光栅输出的情况下确定剩余条带的光栅化时间。 然后可以对每个条带做出决定，将其光栅化到打印引擎，预先计算并将其存储为无损压缩的栅格数据，或者还原为有损压缩的预计算版本。
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公开(公告)号：US5112241A
公开(公告)日：1992-05-12
申请号：US619496
申请日：1990-11-29
IPC分类号： H01R13/52
CPC分类号： H01R13/5202 , F25D2400/40
摘要： A connector seal arrangement having particular adaptability for use within the insulation space between the inner wall and the cabinet wall of a household refrigerator and having a portion extending into the refrigerated space. The rear seal snaps into a watertight relationship with a recess defined at the end of the connector, whereas the front seal is disposed on an upstanding plate or flange extending from the mid-region of the connector. The inner seal is, typically, overmolded on the aforesaid plate and includes a skirt or boot in engagement with the inner surface of the inner wall of the refrigerator. Introduction of insulation presents a sealing relationship between the skirt or boot and the aforesaid inside wall surface. In order to achieve more versatility, the rear seal may include an opening presenting a fracturable membrane for the selective introduction of an electrical connector(s) depending upon total needs. In another invention form, the inner seal may be hand-fitted to a use position on the upstanding flange.
摘要翻译： 一种连接器密封装置，其具有特别适合于在家用冰箱的内壁和柜壁之间的绝缘空间内使用并且具有延伸到冷藏空间中的部分。 后部密封件与连接器端部处限定的凹部锁定成水密关系，而前密封件设置在从连接器的中间区域延伸的直立板或凸缘上。 内密封件通常在上述板上包覆模制，并且包括与冰箱内壁的内表面接合的裙部或靴子。 绝缘介绍在裙部或靴子与上述内壁表面之间呈现密封关系。 为了实现更多的通用性，后密封件可以包括具有可分裂膜的开口，用于根据总体需要选择性地引入电连接器。 在另一个发明形式中，内密封件可以手工安装到直立法兰上的使用位置。
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公开(公告)号：US5008468A
公开(公告)日：1991-04-16
申请号：US384251
申请日：1989-08-21
IPC分类号： B01J31/10 , B01J31/16 , B01J31/18 , C07C2/66 , C07C45/45 , C07C45/46 , C07C45/53 , C07C45/74 , C07C201/08 , C07C205/06
CPC分类号： C07C45/455 , B01J31/10 , B01J31/1658 , B01J31/185 , C07C2/66 , C07C45/46 , C07C45/53 , C07C45/74 , C07C67/04 , B01J2231/12 , B01J2231/20 , B01J2231/323 , B01J2231/52 , B01J2531/48 , C07C2531/06
摘要： This invention provides an improved process for the conversion of reactant into a reaction product, in the presence of a solid acid catalyst comprising sulfonic acid groups covalently bonded to a polymeric chain, wherein the improvement comprises increasing the rate of conversion, on an equivalent sulfonic acid basis, by providing, as said polymeric chain a compound represented by the general formula:M(O.sub.3 ZO.sub.x R).sub.nwherein M is a tetravalent metal ion; Z is a pentavalent atom, selected from the group consisting of elements of Group V of the Periodic Table of the Elements having an atomic weight greater than 30; x varies from 0 to 1; R is select d from the group consisting or organo radicals and mixtures of hydrogen radicals and organo radicals; and n varies from 1 to 2; provided that n is 1 when R is terminated with a tri- or tetraoxy pentavalent atom.
摘要翻译： 本发明提供了在包含共价键合到聚合物链上的磺酸基团的固体酸催化剂存在下将反应物转化成反应产物的改进方法，其中改进包括增加转化速率等同于磺酸 通过提供作为所述聚合物链的由通式M（O 3 Z x R）n表示的化合物，其中M是四价金属离子; Z是选自原子量大于30的元素周期表第Ⅴ族的元素的五价原子; x从0变化到1; R是选自下组的组或有机基团和氢基团和有机基团的混合物; n从1变化到2; 条件是当R用三或四氧基五价原子封端时n为1。
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公开(公告)号：US20110015055A1
公开(公告)日：2011-01-20
申请号：US12504953
申请日：2009-07-17
申请人： Michael D. Cooper
发明人： Michael D. Cooper
IPC分类号： B01J38/00
CPC分类号： B01J38/60 , B01D53/86 , B01D2255/20776 , B01D2257/404 , B01J21/06 , B01J23/22 , B01J23/28 , B01J23/30 , B01J23/90 , B01J29/00 , B01J38/485
摘要： This invention is directed to a process for removing a catalyst inhibitor from a substrate or catalytic converter containing at least one nitrogen oxide (NOx) catalyst using a phosphoric acid composition. The process is particularly suited for removing the catalyst inhibitor, arsenic, from a fly ash-coated substrate or converter. A substantial amount of catalyst inhibitor can be removed from a fly ash-coated catalytic converter without removing a significant portion of one or more of the NOx reduction catalysts in or on the substrate.
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8.发明授权System and method for implementing a user interface for use with Japanese characters 失效用于实现用于日语字符的用户界面的系统和方法公开(公告)号：US06810504B2
公开(公告)日：2004-10-26
申请号：US10039397
申请日：2002-01-03
IPC分类号： G06F314
CPC分类号： G06F3/018 , G06F3/0236
摘要： A system and method for implementing a user interface for use with Japanese characters includes a font-encoder compiler on a host computer for encoding selected text strings and creating custom fonts, and further includes an electronic device which contains a standard font and a font manager. The font manager selectively accesses the standard font and the custom fonts to display the encoded text strings on the user interface of the electronic device. Specific characters may be selected by entering a hierarchical text edit dialog, choosing a character category, selecting an articulation group and then choosing a specific character from the selected articulation group.
摘要翻译： 用于实现与日文字符一起使用的用户界面的系统和方法包括在主计算机上用于编码所选择的文本串和创建自定义字体的字体编码器编译器，还包括包含标准字体和字体管理器的电子设备。 字体管理器选择性地访问标准字体和自定义字体，以在电子设备的用户界面上显示经编码的文本字符串。 可以通过输入分层文本编辑对话框，选择字符类别，选择关节组，然后从所选择的关节组中选择特定字符来选择特定字符。
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公开(公告)号：US5430398A
公开(公告)日：1995-07-04
申请号：US176558
申请日：1994-01-03
IPC分类号： H03K19/0944 , H03K19/20
CPC分类号： H03K19/09448
摘要： A BiCMOS non-inverting buffer circuit (40) with small fan-in capacitance and excellent bipolar output drive. The circuit is ideal for buffering CMOS logic gates from excessive fan-out loads. The circuit also is less complex and more silicon efficient than present buffer circuit implementations, it provides improved transient saturation charge clamping and one buffer macro in an ASIC library can provide extended drive capability to all CMOS logic gates in the library.
摘要翻译： 一个BiCMOS非反相缓冲电路（40），具有小的扇入电容和出色的双极性输出驱动。 该电路非常适合缓冲CMOS逻辑门从过多的扇出负载。 该电路与现在的缓冲电路实现相比并不复杂，硅效率更高，它提供了改进的瞬态饱和电荷钳位，ASIC库中的一个缓冲器宏可以为库中的所有CMOS逻辑门提供扩展的驱动能力。
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公开(公告)号：US20110167951A1
公开(公告)日：2011-07-14
申请号：US13004797
申请日：2011-01-11
申请人： Scott J. Thiel , Michael D. Cooper
发明人： Scott J. Thiel , Michael D. Cooper
IPC分类号： G05G1/44
CPC分类号： G05G1/44 , Y10T74/20528
摘要： Embodiments relate to pedal assemblies, particularly pedal assemblies having a kickdown device that includes one or more deformable tactile domes adapted to uniformly deform or invert on application of sufficient force. This deformation, flattening, or inversion may result in a kickdown effect that may correspond to an engine kickdown. Additionally, the device may be adapted for engagement with a pedal assembly to impart a hysteresis effect as the pedal moves relative to the body.
摘要翻译： 实施例涉及踏板组件，特别是具有降落装置的踏板组件，其包括适于在施加足够的力时均匀地变形或反转的一个或多个可变形触觉穹顶。 这种变形，平坦化或反转可能导致可能对应于发动机降落的降落效应。 此外，该装置可以适于与踏板组件接合以在踏板相对于身体移动时产生滞后效应。
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