摘要:
A sense amplifier having a negative capacitance circuit receives differential input signals via a pair of data lines, and senses and amplifies a voltage difference between differential output signals corresponding to the differential input signals as loaded by the negative capacitance circuit using a differential-to-single-ended amplifier to generate a corresponding data output signal.
摘要:
An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.
摘要:
A correlated double sampling circuit includes a delta-sigma modulator, a selection circuit, and an accumulation circuit. The delta-sigma modulator is configured to receive an input signal, delta-sigma modulate the input signal, and output a modulation signal. The selection circuit is configured to invert the modulation signal and selectively output one of the modulation signal and an inverted modulation signal in response to a selection signal corresponding to an operation phase. The accumulation circuit is configured to generate a first accumulation result by performing an accumulation process on one of the modulation signal and the inverted modulation signal in a first operation phase, and generate a second accumulation result by performing the accumulation process on the first accumulation result and the other one of the modulation signal and the inverted modulation signal in a second operation phase.
摘要:
Example embodiments are directed to an analog-to-digital converter (ADC) that controls a gain by changing a system parameter, an image sensor including the ADC and a method of operating the ADC. The ADC includes a sigma-delta modulator which receives an input signal and a clock signal and sigma-delta modulates the input signal into a digital output signal based on the clock signal and an accumulation unit which accumulates the digital output signal at each cycle of the clock signal according to an analog-to-digital conversion time and outputs an accumulation result. A system parameter is varied during the analog-to-digital conversion time to control a gain of the ADC. The method of operating the analog-to-digital converter includes sigma-delta modulating an input signal into a digital output signal in response to a clock signal input to the ADC; and accumulating the digital output signal at each cycle of the input clock signal according to an analog-to-digital conversion time and outputting an accumulation result.
摘要:
A correlated double sampling (CDS) circuit is provided. The CDS circuit is configured to perform a CDS on a reset signal and an image signal during a CDS phase respectively. The CDS circuit includes a sampling circuit configured to output a difference between a correlated double sampled reset signal and a correlated double sampled image signal, and a feedback unit configured to feedback the difference output from the sampling circuit during a PGA phase to an input of the sampling circuit.
摘要:
An analog-digital converter (ADC) includes a correlated double sampling (CDS) circuit configured to perform CDS on each of a reset signal and an image signal output from a pixel to generate a correlated double sampled reset signal and a correlated double sampled image signal, respectively. A delta sigma (ΔΣ) ADC, also included in the ADC, is configured to output a difference between a first digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled reset signal and a second digital code that is generated by performing ΔΣ analog-digital conversion on the correlated double sampled image signal.
摘要:
An analog-to-digital converter includes a modulation unit and a digital signal generation unit. The modulation unit is disposed corresponding to at least one column line, and sequentially perform delta-sigma modulation on an analog input signal and at least one residue voltage to generate digital bit stream signals. The analog input signal is input through the at least one column line. The at least one residue voltage is generated by performing the delta-sigma modulation on the analog input signal. The digital signal generation unit generates a digital signal corresponding to the analog input signal based on the digital bit stream signals.
摘要:
An amplifier is provided. The amplifier includes a differential amplifier including a tail, a current mirror connected between output terminals of the differential amplifier and a power line receiving a supply voltage, and a first switching circuit for connecting and disconnecting one of the output terminals of the differential amplifier to and from the tail in response to a first switching signal.
摘要:
An analog-to-digital converter includes a comparison signal generation unit and a control unit. The comparison signal generation unit determines a logic level of a comparison signal by comparing an input signal with a selected reference signal based on a switch control signal in a first comparison mode, and by comparing a difference voltage with a ramp signal based on the switch control signal in a second comparison mode. The difference voltage is generated based on the input signal and the selected reference signal such that a level of the difference voltage is lower than a fine voltage level corresponding to a voltage level of the selected reference signal in the second comparison mode. The control unit generates the switch control signal based on the comparison signal and a mode selection signal.
摘要:
Provided are a pixel sensor array and a complementary metal-oxide semiconductor (CMOS) image sensor including the same. The pixel sensor array includes a photoelectric transformation element configured to generate electric charges in response to incident light. A signal transmitting circuit is configured to output the electric charges accumulated in the photoelectric transformation element to a first node based on a first control signal, change an electric potential of the first node to an electric potential of a second signal line based on a second control signal, and output a signal sensed in the first node to a first signal line based on a third control signal. A switch element is configured to connect a supply power terminal to the second signal line based on a fourth control signal. A comparator connected to the first signal line and the second signal line and configured to compare a voltage of the signal and a voltage of a reference signal.