摘要:
A method of controlling cooling of a processor, including monitoring at least one parameter of a current status of the processor and determining in which of a plurality of value ranges the at least one parameter of the current status of the processor is located. If the at least one parameter is located in a first range, determining a first desired value for a cooling parameter, based on the processor temperature, using a first method, determining a second desired value for the cooling parameter, based on the processor temperature, using a second method, in which the value of the cooling parameter increases, in a manner indicating more cooling, from a low value for a low processor temperature to a higher value for a higher processor temperature and selecting a value of the cooling parameter as a function of the first and second desired values. If the at least one parameter is located in a second range, selecting a value of the cooling parameter of the processor using a third method, based on the processor temperature. Further controlling a cooling unit of the processor according to the selected value of the cooling parameter; and repeating periodically the monitoring, range determination, value selection and controlling.
摘要:
Various embodiments of the present invention are related to incident tracking systems and methods. A method allows for receiving input that specifies an incident at a facility, defining a search area adjacent to a position of the incident, and displaying one or more other incidents that occurred at the facility within the search area. A further method allows for dynamically plotting, each time a search area is changed on a map of a facility and an associated date range is indicated, positions on the map within the search area so as to indicate where incidents have occurred at the facility within the date range. Another method allows for receiving input that specifies a name of a person associated with an incident at a facility, and automatically flagging the person as being of interest if the person has been involved in one or more other incidents at the facility.
摘要:
An embedded controller includes a microcontroller core, a first bus interface that does not support bus arbitration, a second bus interface and memory control circuitry. The first bus interface is configured to receive and transmit memory transactions from and to a Central Processing Unit (CPU) chipset. The second bus interface is configured to communicate with a memory and to transfer the memory transactions of the CPU chipset to and from the memory. The memory control circuitry is configured to evaluate a starvation condition that identifies an inability of the microcontroller core to access the memory via the second bus interface due to the memory transactions transferred between the CPU chipset and the memory via the first and second bus interfaces, and to invoke a predefined corrective action when the starvation condition is met.
摘要:
An Reed-Solomon encoder and method for block-code encoding by performing a plurality of Galois-Field (GF) multiplication operations utilizing a single GF multiplier. The multiplier generates a set of partial products that are used to calculate all the multiplication operations required for the encoding.
摘要:
An embedded controller includes a microcontroller core and memory control circuitry. The memory control circuitry is configured to communicate with a Central Processing Unit (CPU) chipset over a first Serial Peripheral Interface (SPI), for which bus arbitration is not supported, at a first clock rate, to communicate with a memory over a second SPI at a second, fixed clock rate, to relay memory transactions between the CPU chipset and the memory over the first and second SPIs, to identify time intervals in which no memory transactions are relayed on the second SPI and to retrieve from the memory information for operating the microcontroller core during the identified time intervals.
摘要:
An embedded controller includes a microcontroller core, a first bus interface that does not support bus arbitration, a second bus interface and memory control circuitry. The first bus interface is configured to receive and transmit memory transactions from and to a Central Processing Unit (CPU) chipset. The second bus interface is configured to communicate with a memory and to transfer the memory transactions of the CPU chipset to and from the memory. The memory control circuitry is configured to evaluate a starvation condition that identifies an inability of the microcontroller core to access the memory via the second bus interface due to the memory transactions transferred between the CPU chipset and the memory via the first and second bus interfaces, and to invoke a predefined corrective action when the starvation condition is met.
摘要:
A method of controlling cooling of a processor, including monitoring at least one parameter of a current status of the processor and determining in which of a plurality of value ranges the at least one parameter of the current status of the processor is located. If the at least one parameter is located in a first range, determining a first desired value for a cooling parameter, based on the processor temperature, using a first method, determining a second desired value for the cooling parameter, based on the processor temperature, using a second method, in which the value of the cooling parameter increases, in a manner indicating more cooling, from a low value for a low processor temperature to a higher value for a higher processor temperature and selecting a value of the cooling parameter as a function of the first and second desired values. If the at least one parameter is located in a second range, selecting a value of the cooling parameter of the processor using a third method, based on the processor temperature. Further controlling a cooling unit of the processor according to the selected value of the cooling parameter; and repeating periodically the monitoring, range determination, value selection and controlling.
摘要:
A frequency monitor circuit (FMC) that is part of an integrated circuit chip for monitoring the frequency of one or more clocks present on the chip is disclosed. The FMC includes a reference window generator, operative to output a reference window signal of a given duration, and a clock counter, operative to count all pulses, in any one of the clocks, that occur within the duration of the reference window and to output a corresponding pulse count. The FMC further includes two or more comparators, each operative to compare the pulse count with a respective given threshold value and to output a corresponding indication of frequency deviation. In one configuration, in which the clock is generated on the chip by a frequency multiplier, the reference window generator and the clock counter are shared between the frequency monitor circuit and the frequency multiplier.
摘要:
An embedded controller includes a microcontroller core and memory control circuitry. The memory control circuitry is configured to communicate with a Central Processing Unit (CPU) chipset over a first Serial Peripheral Interface (SPI), for which bus arbitration is not supported, at a first clock rate, to communicate with a memory over a second SPI at a second, fixed clock rate, to relay memory transactions between the CPU chipset and the memory over the first and second SPIs, to identify time intervals in which no memory transactions are relayed on the second SPI and to retrieve from the memory information for operating the microcontroller core during the identified time intervals.
摘要:
Methods and systems for controlling the speed of a fan for an electronic system. In some embodiments of the invention, temperatures are associated with changes in the value of a variable relating to fan speed. In one of these embodiments, there is a range of temperatures where the fan speed is fixed. In one embodiment of the invention, where there is a plurality of temperature readings associated with a fan, the temperature reading which would result in the highest fan speed is operative. In one embodiment of the invention, the fan speed control is capable of automatic self-adjustment.