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1.
公开(公告)号:US08216905B2
公开(公告)日:2012-07-10
申请号:US12768063
申请日:2010-04-27
申请人: Ru-Shang Hsiao , Nai-Wen Cheng , Chung-Te Lin , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人: Ru-Shang Hsiao , Nai-Wen Cheng , Chung-Te Lin , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号: H01L21/336
CPC分类号: H01L27/1463 , H01L21/324 , H01L21/823878 , H01L22/34 , H01L27/14689 , H01L29/7842
摘要: The active pixel cell structures and methods of preparing such structures described above enable reduction of dark current and white cell counts for active pixel cells. The process of preparing active pixel cell structures introduces stress on the substrate, which could lead to increased dark current and white cell counts of active pixel cells. By depositing a stress layer as part of a pre-metal dielectric layer with a stress that counters the stress induced, both the dark current and the white cell counts can be reduced. If the transistors of the active pixel cells are NMOS, the carrier mobility can also be increased by a tensile stress layer. Raman Spectroscopy can be used to measure the stress exerted on the substrate prior to the deposition of the stress layer.
摘要翻译: 上述有源像素单元结构和制备这种结构的方法能够减少有源像素单元的暗电流和白细胞计数。 制备有源像素单元结构的过程在衬底上引入应力,这可能导致有源像素单元的暗电流和白细胞计数增加。 通过沉积应力层作为预金属介电层的一部分,其应力引起应力,暗电流和白细胞计数都可以减小。 如果有源像素单元的晶体管是NMOS,则载流子迁移率也可以通过拉伸应力层增加。 拉曼光谱可用于测量在沉积应力层之前施加在基底上的应力。
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2.
公开(公告)号:US20080150663A1
公开(公告)日:2008-06-26
申请号:US11933389
申请日:2007-10-31
申请人: Jien-Wei Yeh , Wen-Chen Chang , Chih-Chao Yang , Nai-Wen Cheng
发明人: Jien-Wei Yeh , Wen-Chen Chang , Chih-Chao Yang , Nai-Wen Cheng
IPC分类号: H01F27/02
CPC分类号: H01F17/0006 , H01F10/131 , H01F10/138 , H01F10/265 , H01F2017/0046 , H01F2017/0066
摘要: A magnetic multi-element alloy film adapted to be used in a high-frequency operation is provided. The magnetic multi-element alloy film is employed to improve a Q factor and an inductance value of a thin film inductor operated in high frequency. The design concept of a multi-element high-entropy alloy is introduced into the magnetic multi-element alloy film. With material characteristics including high randomness, nanometer microcrystalline structure, low coercive magnetic field and high resistivity, the magnetic multi-element alloy film can still have favorable soft magnetism when operated in high frequency.
摘要翻译: 提供了适用于高频操作的磁性多元素合金膜。 磁性多元素合金薄膜用于提高高频工作的薄膜电感器的Q因子和电感值。 将多元素高熵合金的设计理念引入到磁性多元素合金薄膜中。 具有高随机性,纳米微晶结构,低矫顽磁场和高电阻率的材料特性,磁性多元素合金膜在高频运行时仍具有良好的软磁性。
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3.
公开(公告)号:US08778717B2
公开(公告)日:2014-07-15
申请号:US12726215
申请日:2010-03-17
申请人: Ru-Shang Hsiao , Chung-Te Lin , Nai-Wen Cheng , Yin-Kai Liao , Wei Chuang Wu
发明人: Ru-Shang Hsiao , Chung-Te Lin , Nai-Wen Cheng , Yin-Kai Liao , Wei Chuang Wu
IPC分类号: H01L21/00
CPC分类号: H01L21/76213 , H01L21/26513 , H01L21/26533 , H01L31/103 , H01L31/1804 , Y02E10/547 , Y02P70/521
摘要: A method of forming an integrated circuit structure includes providing a silicon substrate, and implanting a p-type impurity into the silicon substrate to form a p-type region. After the step of implanting, performing an anneal to form a silicon oxide region, with a portion of the p-type region converted to the silicon oxide region.
摘要翻译: 形成集成电路结构的方法包括提供硅衬底,并将p型杂质注入硅衬底中以形成p型区域。 在注入步骤之后,进行退火以形成氧化硅区域,其中一部分p型区域转换为氧化硅区域。
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公开(公告)号:US08389377B2
公开(公告)日:2013-03-05
申请号:US12753440
申请日:2010-04-02
申请人: Ru-Shang Hsiao , Kun-Yu Tsai , Chien-Hsien Tseng , Shou-Gwo Wuu , Nai-Wen Cheng
发明人: Ru-Shang Hsiao , Kun-Yu Tsai , Chien-Hsien Tseng , Shou-Gwo Wuu , Nai-Wen Cheng
IPC分类号: H01L21/76
CPC分类号: H01L27/1464 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14689
摘要: The present disclosure provides methods and apparatus for sensor element isolation in a backside illuminated image sensor. In one embodiment, a method of fabricating a semiconductor device includes providing a sensor layer having a frontside surface and a backside surface, forming a plurality of frontside trenches in the frontside surface of the sensor layer, and implanting oxygen into the sensor layer through the plurality of frontside trenches. The method further includes annealing the implanted oxygen to form a plurality of first silicon oxide blocks in the sensor layer, wherein each first silicon oxide block is disposed substantially adjacent a respective frontside trench to form an isolation feature. A semiconductor device fabricated by such a method is also disclosed.
摘要翻译: 本公开提供了用于背面照明图像传感器中的传感器元件隔离的方法和装置。 在一个实施例中,制造半导体器件的方法包括提供具有前侧表面和后侧表面的传感器层,在传感器层的前侧表面中形成多个前侧沟槽,并且通过多个将氧气注入到传感器层中 的前方的沟渠。 该方法还包括退火注入的氧以在传感器层中形成多个第一氧化硅块,其中每个第一氧化硅块基本上邻近相应的前侧沟槽设置以形成隔离特征。 还公开了通过这种方法制造的半导体器件。
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5.
公开(公告)号:US20110241152A1
公开(公告)日:2011-10-06
申请号:US12753440
申请日:2010-04-02
申请人: Ru-Shang Hsiao , Kun-Yu Tsai , Chien-Hsien Tseng , Shou-Gwo Wuu , Nai-Wen Cheng
发明人: Ru-Shang Hsiao , Kun-Yu Tsai , Chien-Hsien Tseng , Shou-Gwo Wuu , Nai-Wen Cheng
IPC分类号: H01L27/146 , H01L31/18
CPC分类号: H01L27/1464 , H01L27/14621 , H01L27/14627 , H01L27/1463 , H01L27/14689
摘要: The present disclosure provides methods and apparatus for sensor element isolation in a backside illuminated image sensor. In one embodiment, a method of fabricating a semiconductor device includes providing a sensor layer having a frontside surface and a backside surface, forming a plurality of frontside trenches in the frontside surface of the sensor layer, and implanting oxygen into the sensor layer through the plurality of frontside trenches. The method further includes annealing the implanted oxygen to form a plurality of first silicon oxide blocks in the sensor layer, wherein each first silicon oxide block is disposed substantially adjacent a respective frontside trench to form an isolation feature. A semiconductor device fabricated by such a method is also disclosed.
摘要翻译: 本公开提供了用于背面照明图像传感器中的传感器元件隔离的方法和装置。 在一个实施例中,制造半导体器件的方法包括提供具有前侧表面和背面的传感器层,在传感器层的前侧表面中形成多个前侧沟槽,并且通过多个将氧气注入到传感器层中 的前方的沟渠。 该方法还包括退火注入的氧以在传感器层中形成多个第一氧化硅块,其中每个第一氧化硅块基本上邻近相应的前侧沟槽设置以形成隔离特征。 还公开了通过这种方法制造的半导体器件。
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6.
公开(公告)号:US07570145B2
公开(公告)日:2009-08-04
申请号:US11933389
申请日:2007-10-31
申请人: Jien-Wei Yeh , Wen-Chen Chang , Chih-Chao Yang , Nai-Wen Cheng
发明人: Jien-Wei Yeh , Wen-Chen Chang , Chih-Chao Yang , Nai-Wen Cheng
IPC分类号: H01F27/24
CPC分类号: H01F17/0006 , H01F10/131 , H01F10/138 , H01F10/265 , H01F2017/0046 , H01F2017/0066
摘要: A magnetic multi-element alloy film adapted to be used in a high-frequency operation is provided. The magnetic multi-element alloy film is employed to improve a Q factor and an inductance value of a thin film inductor operated in high frequency. The design concept of a multi-element high-entropy alloy is introduced into the magnetic multi-element alloy film. With material characteristics including high randomness, nanometer microcrystalline structure, low coercive magnetic field and high resistivity, the magnetic multi-element alloy film can still have favorable soft magnetism when operated in high frequency.
摘要翻译: 提供了适用于高频操作的磁性多元素合金膜。 磁性多元素合金薄膜用于提高高频工作的薄膜电感器的Q因子和电感值。 将多元素高熵合金的设计理念引入到磁性多元素合金薄膜中。 具有高随机性,纳米微晶结构,低矫顽磁场和高电阻率的材料特性,磁性多元素合金膜在高频运行时仍具有良好的软磁性。
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7.
公开(公告)号:US08546860B2
公开(公告)日:2013-10-01
申请号:US13494769
申请日:2012-06-12
申请人: Ru-Shang Hsiao , Nai-Wen Cheng , Chung-Te Lin , Chien-Hsien Tseng , Shou-Gwo Wuu
发明人: Ru-Shang Hsiao , Nai-Wen Cheng , Chung-Te Lin , Chien-Hsien Tseng , Shou-Gwo Wuu
IPC分类号: H01L31/113 , H01L31/173
CPC分类号: H01L27/1463 , H01L21/324 , H01L21/823878 , H01L22/34 , H01L27/14689 , H01L29/7842
摘要: This disclosure relates to an active pixel cell including a shallow trench isolation (STI) structure. The active pixel cell further includes a photodiode neighboring the STI structure, where a first stress resulted from substrate processing prior to deposition of a pre-metal dielectric layer increases dark current and white cell counts of a photodiode of the active pixel cell. The active pixel cell further includes a transistor, where the transistor controls the operation of the active pixel cell. The active pixel cell further includes a stress layer over the photodiode, the STI structure, and the transistor, and the stress layer has a second stress that counters the first stress exerted on the substrate, and the second stress reduces the dark current and the white cell counts caused by the first stress.
摘要翻译: 本公开涉及包括浅沟槽隔离(STI)结构的有源像素单元。 有源像素单元还包括与STI结构相邻的光电二极管,其中在沉积预金属介电层之前由衬底处理产生的第一应力增加了有源像素单元的光电二极管的暗电流和白细胞计数。 有源像素单元还包括晶体管,其中晶体管控制有源像素单元的操作。 有源像素单元还包括光电二极管上的应力层,STI结构和晶体管,并且应力层具有对施加在衬底上的第一应力进行反映的第二应力,并且第二应力减小暗电流和白色 细胞计数由第一次压力引起。
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公开(公告)号:US20120248515A1
公开(公告)日:2012-10-04
申请号:US13494769
申请日:2012-06-12
申请人: Ru-Shang HSIAO , Nai-Wen CHENG , Chung-Te LIN , Chien-Hsien TSENG , Shou-Gwo WUU
发明人: Ru-Shang HSIAO , Nai-Wen CHENG , Chung-Te LIN , Chien-Hsien TSENG , Shou-Gwo WUU
IPC分类号: H01L27/146
CPC分类号: H01L27/1463 , H01L21/324 , H01L21/823878 , H01L22/34 , H01L27/14689 , H01L29/7842
摘要: This disclosure relates to an active pixel cell including a shallow trench isolation (STI) structure. The active pixel cell further includes a photodiode neighboring the STI structure, where a first stress resulted from substrate processing prior to deposition of a pre-metal dielectric layer increases dark current and white cell counts of a photodiode of the active pixel cell. The active pixel cell further includes a transistor, where the transistor controls the operation of the active pixel cell. The active pixel cell further includes a stress layer over the photodiode, the STI structure, and the transistor, and the stress layer has a second stress that counters the first stress exerted on the substrate, and the second stress reduces the dark current and the white cell counts caused by the first stress.
摘要翻译: 本公开涉及包括浅沟槽隔离(STI)结构的有源像素单元。 有源像素单元还包括与STI结构相邻的光电二极管,其中在沉积预金属介电层之前由衬底处理产生的第一应力增加了有源像素单元的光电二极管的暗电流和白细胞计数。 有源像素单元还包括晶体管,其中晶体管控制有源像素单元的操作。 有源像素单元还包括光电二极管上的应力层,STI结构和晶体管,并且应力层具有对施加在衬底上的第一应力进行反映的第二应力,并且第二应力减小暗电流和白色 细胞计数由第一次压力引起。
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公开(公告)号:US20110260223A1
公开(公告)日:2011-10-27
申请号:US12768063
申请日:2010-04-27
申请人: Ru-Shang HSIAO , Nai-Wen CHENG , Chung-Te LIN , Chien-Hsien TSENG , Shou-Gwo WUU
发明人: Ru-Shang HSIAO , Nai-Wen CHENG , Chung-Te LIN , Chien-Hsien TSENG , Shou-Gwo WUU
IPC分类号: H01L27/146 , H01L21/31 , H01L21/66
CPC分类号: H01L27/1463 , H01L21/324 , H01L21/823878 , H01L22/34 , H01L27/14689 , H01L29/7842
摘要: The active pixel cell structures and methods of preparing such structures described above enable reduction of dark current and white cell counts for active pixel cells. The process of preparing active pixel cell structures introduces stress on the substrate, which could lead to increased dark current and white cell counts of active pixel cells. By depositing a stress layer as part of a pre-metal dielectric layer with a stress that counters the stress induced, both the dark current and the white cell counts can be reduced. If the transistors of the active pixel cells are NMOS, the carrier mobility can also be increased by a tensile stress layer. Raman Spectroscopy can be used to measure the stress exerted on the substrate prior to the deposition of the stress layer.
摘要翻译: 上述有源像素单元结构和制备这种结构的方法能够减少有源像素单元的暗电流和白细胞计数。 制备有源像素单元结构的过程在衬底上引入应力,这可能导致有源像素单元的暗电流和白细胞计数增加。 通过沉积应力层作为预金属介电层的一部分,其应力引起应力,暗电流和白细胞计数都可以减小。 如果有源像素单元的晶体管是NMOS,则载流子迁移率也可以通过拉伸应力层增加。 拉曼光谱可用于测量在沉积应力层之前施加在基底上的应力。
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公开(公告)号:US08139086B2
公开(公告)日:2012-03-20
申请号:US12117234
申请日:2008-05-08
IPC分类号: G09G5/00
CPC分类号: G09G5/42 , G09G5/391 , G09G5/393 , G09G5/395 , G09G5/397 , G09G2340/0407 , G09G2340/0464 , G09G2360/128
摘要: The invention provides an image processing method. An image is provided, and the image is divided into a first subimage, a second subimage, a third subimage, and a fourth subimage according to a decomposing method. Next, the first, second, third, and fourth subimages are processed to generate a first subframe, a second subframe, a third subframe, and a fourth subframe. Finally, the first, second, third, and fourth subframes are combined as a frame according to a composing method corresponding to the decomposing method.
摘要翻译: 本发明提供一种图像处理方法。 提供图像,并且根据分解方法将图像划分为第一子图像,第二子图像,第三子图像和第四子图像。 接下来,处理第一,第二,第三和第四子图像以产生第一子帧,第二子帧,第三子帧和第四子帧。 最后,根据与分解方法相对应的构成方法,将第一,第二,第三和第四子帧组合为帧。
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