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1.发明授权公开(公告)号：US11513163B2
公开(公告)日：2022-11-29
申请号：US16643452
申请日：2018-08-28
发明人： Naohisa Hatani , Gorou Mori
IPC分类号： G01R31/396 , G01R31/3835 , H01M10/48
摘要： A voltage detection circuit is provided for measuring each cell voltage of an assembled battery configured by connecting a plurality of cells in series. The voltage detection circuit is defined as a first voltage detection circuit. The voltage detection circuit includes a downstream communication circuit that communicates with a host apparatus to communicate with a plurality of voltage detection circuits connected in series with each other; a reply signal generation circuit that generates a reply signal containing data detected by the first voltage detection circuit; an upstream transfer circuit that transfers a signal received by the upstream communication circuit to downstream; a dummy current consumption circuit that consumes a predetermined dummy current; and a control circuit that controls the reply signal generation circuit, the upstream transfer circuit, and the dummy current consumption circuit to selectively operate any one of them.
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公开(公告)号：US11343457B2
公开(公告)日：2022-05-24
申请号：US15930164
申请日：2020-05-12
发明人： Masahiro Higuchi
摘要： An output buffer of a super source follower for driving a reference ramp signal of a column-parallel single slope type ADC of a solid-state imaging device is made as a class AB feedback configuration for controlling a feedback variable current source with a signal obtained by amplifying a current fluctuation flowing through an amplification transistor by an amplifier, and thereby, the upper limit of the drain voltage of the amplification transistor is not limited by the voltage between the gate and the source of the feedback variable current source.
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公开(公告)号：USD951213S1
公开(公告)日：2022-05-10
申请号：US29734428
申请日：2020-05-12
设计人： Takeshi Imamura , Kazuma Yoshida , Ryosuke Okawa , Toshikazu Imai
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公开(公告)号：US11195904B2
公开(公告)日：2021-12-07
申请号：US16933574
申请日：2020-07-20
发明人： Kouki Yamamoto , Masatoshi Kamitani , Shingo Matsuda , Hiroshi Sugiyama , Kaname Motoyoshi , Masao Nakayama
IPC分类号： H01L29/06 , H01L21/50 , H01L23/66 , H01L29/423 , H01L29/812
摘要： A high-frequency transistor includes a source electrode, a drain electrode, a gate electrode, and a gate drive line that applies a voltage to the gate electrode. An impedance adjustment circuit is connected between the gate electrode and the gate drive line. A characteristic impedance of the gate electrode is Z1, when a connecting point between the impedance adjustment circuit and the gate electrode is viewed from the impedance adjustment circuit. A characteristic impedance of the gate drive line is Z2, when a connecting point between the impedance adjustment circuit and the gate drive line is viewed from the impedance adjustment circuit. X that denotes a characteristic impedance of the impedance adjustment circuit is a value between Z1 and Z2.
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公开(公告)号：US11171234B2
公开(公告)日：2021-11-09
申请号：US16986810
申请日：2020-08-06
IPC分类号： H01L29/78 , H01L23/538 , H01L27/088
摘要： A semiconductor device includes a first transistor disposed in a first region of a semiconductor layer and a second transistor disposed in a second region of the semiconductor layer, and includes, on the surface of the semiconductor layer, first source pads, a first gate pad, second source pads, and a second gate pad. In the plan view of the semiconductor layer, the first and second transistors are aligned in a first direction; the first gate pad is disposed such that none of the first source pads is disposed between the first gate pad and a side parallel to the first direction and located closest to the first gate pad; and the second gate pad is disposed such that none of the second source pads is disposed between the second gate pad and a side parallel to the first direction and located closest to the second gate pad.
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公开(公告)号：US11069783B2
公开(公告)日：2021-07-20
申请号：US17075218
申请日：2020-10-20
发明人： Eiji Yasuda , Toshikazu Imai , Ryosuke Okawa , Takeshi Imamura , Mitsuaki Sakamoto , Kazuma Yoshida , Masaaki Hirako , Yasuyuki Masumoto , Shigetoshi Sota , Tomonari Oota
IPC分类号： H01L29/417 , H01L25/07 , H01L29/78 , H01L23/498 , H01L23/00 , H01L29/36 , H01L29/45 , H01L27/088 , H01L21/3205 , H01L21/768 , H01L21/8234 , H01L25/18 , H02J7/00 , H01L23/522 , H01L23/13 , H01L23/31
摘要： A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors. The thickness of the backside electrode ranges from 25 to 35 μm, and the ratio of the thickness of the backside electrode to the thickness of a semiconductor layer including the semiconductor substrate and the low-concentration impurity layer is 0.32 or more.
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公开(公告)号：US11056563B2
公开(公告)日：2021-07-06
申请号：US17075290
申请日：2020-10-20
发明人： Eiji Yasuda , Toshikazu Imai , Ryosuke Okawa , Takeshi Imamura , Mitsuaki Sakamoto , Kazuma Yoshida , Masaaki Hirako , Yasuyuki Masumoto , Shigetoshi Sota , Tomonari Oota
IPC分类号： H01L29/417 , H01L21/3205 , H01L21/768 , H01L21/8234 , H01L25/18 , H02J7/00 , H01L23/522 , H01L29/78 , H01L25/07 , H01L23/13 , H01L23/498 , H01L23/00 , H01L29/36 , H01L29/45 , H01L27/088 , H01L23/31
摘要： A semiconductor device includes a semiconductor substrate including a first conductivity-type impurity, a low-concentration impurity layer including a first conductivity-type impurity having a concentration lower than a concentration of the first conductivity-type impurity in the semiconductor substrate, a backside electrode including a metal material, and first and second transistors in the low-concentration impurity layer. The first transistor includes a first source electrode and a first gate electrode on a surface of the low-concentration impurity layer, the second transistor includes a second source electrode and a second gate electrode on the surface of the low-concentration impurity layer. The semiconductor substrate serves as a common drain region of the transistors. The thickness of the backside electrode ranges from 25 to 35 μm, and the ratio of the thickness of the backside electrode to the thickness of a semiconductor layer including the semiconductor substrate and the low-concentration impurity layer is 0.32 or more.
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公开(公告)号：US20210118926A1
公开(公告)日：2021-04-22
申请号：US17133617
申请日：2020-12-23
发明人： Mitsuhiko Otani , Junichi Matsuo , Haruka Takano
IPC分类号： H01L27/146 , G01S17/10 , H04N5/341 , G01S7/487 , G01S17/894 , G01C3/06 , G01S7/4863 , H01L31/101 , H04N5/335
摘要： A distance-measuring imaging device includes a light source that applies light according to timing of a light emission signal; a solid-state imager that performs, for an object, exposure according to timing of an exposure signal, and generates raw data corresponding to an exposure amount of the exposure; a signal amount comparator that determines a magnitude relationship in signal amount in the raw data; and a distance calculator that generates and outputs a distance signal based on a determination result. The solid-state imager accumulates, in each of different signal accumulation regions for accumulating signals detected in a same pixel, a signal by exposure in an exposure period that differs in exposure signal timing. The signal amount comparator determines the magnitude relationship between the signals accumulated in the signal accumulation regions. The distance calculator calculates the distance to the object using an arithmetic expression selected depending on the determination result.
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公开(公告)号：US20210016395A1
公开(公告)日：2021-01-21
申请号：US17061936
申请日：2020-10-02
发明人： Daisuke IKEDA , Hideo KITAGAWA , Hiroshi ASAKA , Masayuki ONO
IPC分类号： B23K26/359 , H01S5/02 , B23K26/082 , B23K26/0622 , B23K26/386
摘要： A puncture forming method is a method of forming punctures in a sample by irradiating a surface of the sample with a light beam. The puncture forming method includes: forming a first puncture by irradiating a first position on the surface of the sample with a first pulse of the light beam; and after the forming of the first puncture, forming a second puncture which at least partially overlaps the first puncture by irradiating, with a second pulse of the light beam, a second position on the surface of the sample positioned away from the first position in a first direction. The second puncture has a tip which is positioned inside the sample and which is bent in a direction opposite to the first direction.
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10.发明申请公开(公告)号：US20200379019A1
公开(公告)日：2020-12-03
申请号：US16997476
申请日：2020-08-19
发明人： Naohisa HATANI , Jiro MIYAKE
IPC分类号： G01R19/00 , G01R31/396 , H01M10/48
摘要： A voltage measurement device includes: a plurality of voltage detection circuits which measure cell voltages of a plurality of cells connected in series. Each of the plurality of voltage detection circuits includes: a device address generating circuit which generates a device address according to a first address assignment command received from a preceding voltage detection circuit located at a preceding stage; and an address assignment command generating circuit which generates a second address assignment command according to the first address assignment command, and sends the second address assignment command to a next voltage detection circuit located at a next stage.
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