Electrical interconnects for photovoltaic modules and methods thereof
    3.
    发明授权
    Electrical interconnects for photovoltaic modules and methods thereof 有权
    用于光伏组件的电气互连及其方法

    公开(公告)号:US09343592B2

    公开(公告)日:2016-05-17

    申请号:US13195562

    申请日:2011-08-01

    申请人: Thomas Peter Hunt

    发明人: Thomas Peter Hunt

    摘要: System and method for interconnecting photovoltaic modules. The system includes a first photovoltaic module and a second photovoltaic module. The first photovoltaic module includes a first bus bar and a first interconnect tab connected to the first bus bar. The second photovoltaic module includes a second bus bar and a second interconnect tab connected to the second bus bar. The system for interconnecting photovoltaic modules additionally includes a module interconnector configured to interconnect the first and the second photovoltaic modules. The module interconnector includes an interconnection component and an interconnection protector. Additionally, the system for interconnecting photovoltaic modules includes a first connection component connecting the interconnection component to the first interconnect tab of the first photovoltaic module and a second connection component connecting the interconnection component to the second interconnect tab of the second photovoltaic module.

    摘要翻译: 用于互连光伏组件的系统和方法。 该系统包括第一光伏模块和第二光伏模块。 第一光伏模块包括第一母线和连接到第一母线的第一互连接线。 第二光伏模块包括第二母线和连接到第二母线的第二互连片。 用于互连光伏模块的系统另外包括被配置为互连第一和第二光伏模块的模块互连器。 模块互连器包括互连部件和互连保护器。 另外,用于互连光伏模块的系统包括将互连部件连接到第一光伏模块的第一互连突片的第一连接部件和将互连部件连接到第二光伏模块的第二互连突片的第二连接部件。

    Debug circuit and a method of debugging
    7.
    发明授权
    Debug circuit and a method of debugging 有权
    调试电路和调试方法

    公开(公告)号:US07900113B2

    公开(公告)日:2011-03-01

    申请号:US12028440

    申请日:2008-02-08

    IPC分类号: G01R31/28 G06F11/00

    摘要: A debug circuit for a multi-mode circuit driven by a clock signal, with an input for a clock signal, and a debug signal generator arranged to generate for each of a subset of the modes of the multi-mode circuit a corresponding debug signal based on a clock signal provided at the input. The frequency of debug signals is dependent on the frequency of a clock signal provided at the input, and each debug signal selects its respective mode for a length of time longer than that of each other mode of the multi-mode circuit, or each debug signal selects its respective mode for a length of time shorter than that of each other mode of the multi-mode circuit.

    摘要翻译: 一种用于由时钟信号驱动的多模电路的调试电路,其具有用于时钟信号的输入,以及调试信号发生器,其被布置为针对多模电路的模式的子集中的每一个生成相应的调试信号 在输入端提供的时钟信号。 调试信号的频率取决于在输入端提供的时钟信号的频率,并且每个调试信号选择其相应模式长于多模电路的每个模式的时间长度,或每个调试信号 选择其相应模式的时间长于多模电路的彼此模式的时间长度。