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1.发明申请公开(公告)号：US20100084012A1
公开(公告)日：2010-04-08
申请号：US12570781
申请日：2009-09-30
申请人： Pierre-Jean RIBEYRON
发明人： Pierre-Jean RIBEYRON
IPC分类号： H01L31/00
CPC分类号： H01L31/075 , H01L31/065 , H01L31/0747 , H01L31/202 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： The invention concerns a photovoltaic cell comprising a heterojunction between a crystalline semiconductor substrate (210) of first conductivity type and a first amorphous layer (220) in the same semiconductor material and of a second conductivity type opposite the first type and having a dopant concentration of between 1.1019 and 1.1022 atoms/cm3. The photovoltaic cell further comprises a second amorphous layer (225) of same conductivity type as the first layer and having a dopant concentration of between 1.1016 and 1.1018 atoms/cm3, said second layer being deposited directly on a first face of the substrate and being coated with said first layer. Finally, on a second face of the substrate opposite the first face, the cell comprises a third amorphous layer (260), in the same material as the substrate and of same conductivity type with a dopant concentration of between 1.1019 and 1.1022 atoms/cm3
摘要翻译： 本发明涉及一种光伏电池，其包括在第一导电类型的晶体半导体衬底（210）和相同半导体材料中的第一非晶体层（220）与第一类型相反的第二导电类型之间的异质结，并具有掺杂剂浓度 在1.1019和1.1022原子/ cm3之间。 光伏电池还包括与第一层相同的导电类型的第二非晶层（225），其掺杂剂浓度在1.1016至1.1018原子/ cm3之间，所述第二层直接沉积在衬底的第一面上并被涂覆 与第一层。 最后，在与第一面相对的衬底的第二面上，电池包括与衬底相同的材料和与掺杂剂浓度在1.1019和1.1022原子/ cm3之间的相同导电类型的第三非晶层（260）
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2.发明授权公开(公告)号：US08877539B2
公开(公告)日：2014-11-04
申请号：US13522829
申请日：2011-01-26
IPC分类号： H01L31/18 , H01L31/20 , H01L21/306 , H01L31/0236 , H01L31/075
CPC分类号： H01L21/30604 , H01L31/02363 , H01L31/075 , H01L31/18 , H01L31/202 , Y02E10/548 , Y02P70/521
摘要： A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.
摘要翻译： 至少一个光伏电池的制造方法包括：连续地对结晶硅衬底的表面进行各向异性蚀刻以及所述表面的各向同性蚀刻处理。 各向同性蚀刻处理包括至少两个连续的操作，分别包括形成具有可控平均厚度的氧化硅薄膜，范围在10nm和500nm之间，并且去除所形成的所述薄膜。 通过热活化干法氧化进行在基板表面上形成氧化硅薄膜的操作。 这种方法使得一旦所述表面以各向异性的方式被蚀刻，就可以提高基板的表面的表面质量。
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3.发明申请Method for production of a semiconductor device with auto-aligned metallisations 失效用于生产具有自动对准金属化的半导体器件的方法公开(公告)号：US20060275936A1
公开(公告)日：2006-12-07
申请号：US10555072
申请日：2004-04-27
申请人： Pierre-Jean Ribeyron , Marc Pirot
发明人： Pierre-Jean Ribeyron , Marc Pirot
IPC分类号： H01L21/00
CPC分类号： H01L31/022433 , Y02E10/50
摘要： This invention relates to a process for making a semiconductor device comprising the following steps: a doped region with a first type of conductivity is made on a first principal face of a semiconductor substrate and at least one window is made, a first metallisation area is deposited on the doped region, a dielectric layer is deposited on at least the window and the first metallisation area, at least a first opening is etched in the dielectric layer at the window to accommodate a doped region with a second type of conductivity while arranging an undoped portion of the semiconductor substrate laterally between the doped regions, the substrate is doped to create the doped region with the second type of conductivity, a second metallisation area is deposited. Application particularly for solar cells in thin layer.
摘要翻译： 本发明涉及一种制造半导体器件的方法，包括以下步骤：在半导体衬底的第一主面上形成具有第一类型导电性的掺杂区域，并且至少形成一个窗口，沉积第一金属化区域 在掺杂区域上，在至少窗口和第一金属化区域上沉积介电层，在窗口处的电介质层中至少蚀刻第一开口以容纳具有第二类型导电性的掺杂区域，同时布置未掺杂的 部分半导体衬底横向于掺杂区域之间，衬底被掺杂以产生具有第二类型导电性的掺杂区域，沉积第二金属化区域。 特别适用于薄层太阳能电池。
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公开(公告)号：US20150013758A1
公开(公告)日：2015-01-15
申请号：US14129362
申请日：2012-06-25
IPC分类号： H01L31/0747 , H01L31/18 , H01L31/0224 , H01L31/0216
CPC分类号： H01L31/0747 , H01L31/02167 , H01L31/02168 , H01L31/022433 , H01L31/1804 , H01L31/1864 , H01L31/208 , Y02E10/50 , Y02P70/521
摘要： The invention provides a process for treating an n-type photovoltaic cell free from all but trace amounts of boron atoms, said process comprising the following steps: providing an n-type heterojunction photovoltaic cell (10) comprising a central crystalline silicon layer (1) on and under which two passivation layers (2, 3) made of hydrogenated amorphous silicon are deposited; heating this cell to a temperature between 20° C. and 200° C., for example on a hot plate (20) or in an oven (40), while illuminating the photovoltaic cell with a light flux from a light source (30). The efficiency of the photovoltaic cell is thus improved and stabilized.
摘要翻译： 本发明提供一种用于处理不含所有微量硼原子的n型光伏电池的方法，所述方法包括以下步骤：提供包含中心晶体硅层（1）的n型异质结光伏电池（10） 在其上沉积由氢化非晶硅制成的两个钝化层（2,3）; 在来自光源（30）的光束照射光伏电池的同时，将该电池加热至20℃至200℃之间的温度，例如加热板（20）或烘箱（40） 。 因此光伏电池的效率得到改善和稳定。
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5.发明申请公开(公告)号：US20120288985A1
公开(公告)日：2012-11-15
申请号：US13522829
申请日：2011-01-26
IPC分类号： H01L31/0376 , H01L31/0368 , H01L31/0352
CPC分类号： H01L21/30604 , H01L31/02363 , H01L31/075 , H01L31/18 , H01L31/202 , Y02E10/548 , Y02P70/521
摘要： A method for producing of at least one photovoltaic cell includes successively the anisotropic etching of a surface of a crystalline silicon substrate and the isotropic etching treatment of said surface. The isotropic etching treatment includes at least two successive operations respectively consisting in forming a silicon oxide thin film with a controlled average thickness, ranging between 10 nm and 500 nm and in removing said thin film thus-formed. The operation consisting in forming a silicon oxide thin film on the face of the substrate is carried out by a thermally activated dry oxidation. Such a method makes it possible to improve the surface quality of the surface of the substrate once said surface is etched in an anisotropic way.
摘要翻译： 至少一个光伏电池的制造方法包括：连续地对结晶硅衬底的表面进行各向异性蚀刻以及所述表面的各向同性蚀刻处理。 各向同性蚀刻处理包括至少两个连续的操作，分别包括形成具有可控平均厚度的氧化硅薄膜，范围在10nm和500nm之间，并且去除所形成的所述薄膜。 通过热活化干法氧化进行在基板表面上形成氧化硅薄膜的操作。 这种方法使得一旦所述表面以各向异性的方式被蚀刻，就可以提高基板的表面的表面质量。
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公开(公告)号：US07947527B2
公开(公告)日：2011-05-24
申请号：US11813721
申请日：2006-01-18
CPC分类号： H01L31/022425 , H01L31/0747 , Y02E10/50 , Y10T428/24479
摘要： A method for metallization of a semiconductor device. This method includes a) metallizing a set of collection fingers with a low-temperature serigraphy paste on at least a front surface of the semiconductor device, b) sintering, at a temperature below a temperature that would damage the semiconductor device, the serigraphy paste forming the set of metallized collection fingers, by performing a pressing operation on the collection fingers with a press, and c) metallizing at least one collection bus on the set of metallized collection fingers, electrically connecting the collection fingers to one another, with a low-temperature serigraphy paste.
摘要翻译： 一种用于半导体器件的金属化的方法。 该方法包括：a）在半导体器件的至少前表面上用低温绢印膏将集合指状物金属化，b）在低于破坏半导体器件的温度的温度下烧结， 通过用压机对所述收集指状件进行按压操作，以及c）在所述一组金属化收集指状物上金属化至少一个收集总线，将所述收集指状物彼此电连接， 温度绢印。
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7.发明授权Method for production of a semiconductor device with auto-aligned metallisations 失效用于生产具有自动对准金属化的半导体器件的方法公开(公告)号：US07364938B2
公开(公告)日：2008-04-29
申请号：US10555072
申请日：2004-04-27
申请人： Pierre-Jean Ribeyron , Marc Pirot
发明人： Pierre-Jean Ribeyron , Marc Pirot
IPC分类号： H01L21/00
CPC分类号： H01L31/022433 , Y02E10/50
摘要： This invention relates to a process for making a semiconductor device comprising the following steps: a doped region with a first type of conductivity is made on a first principal face of a semiconductor substrate and at least one window is made, a first metallisation area is deposited on the doped region, a dielectric layer is deposited on at least the window and the first metallisation area, at least a first opening is etched in the dielectric layer at the window to accommodate a doped region with a second type of conductivity while arranging an undoped portion of the semiconductor substrate laterally between the doped regions, the substrate is doped to create the doped region with the second type of conductivity, a second metallisation area is deposited. Application particularly for solar cells in thin layer.
摘要翻译： 本发明涉及一种制造半导体器件的方法，包括以下步骤：在半导体衬底的第一主面上形成具有第一类型导电性的掺杂区域，并且至少形成一个窗口，沉积第一金属化区域 在掺杂区域上，在至少窗口和第一金属化区域上沉积介电层，在窗口处的电介质层中至少蚀刻第一开口以容纳具有第二类型导电性的掺杂区域，同时布置未掺杂的 部分半导体衬底横向于掺杂区域之间，衬底被掺杂以产生具有第二类型导电性的掺杂区域，沉积第二金属化区域。 特别适用于薄层太阳能电池。
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公开(公告)号：US10276738B2
公开(公告)日：2019-04-30
申请号：US13522901
申请日：2011-01-26
IPC分类号： H01L31/18 , H01L31/0745 , H01L31/0747
摘要： A heterojunction photovoltaic cell includes at least one crystalline silicon oxide film directly placed onto one of the front or rear faces of a crystalline silicon substrate, between said substrate and a layer of amorphous or microcrystalline silicon. The thin film is intended to enable the passivation of said face of the substrate. The thin film is more particularly obtained by radically oxidizing a surface portion of the substrate, before depositing the layer of amorphous silicon. Moreover, a thin layer of intrinsic or microdoped amorphous silicon can be placed between said think film and the layer of amorphous or microcrystalline silicon.
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9.发明授权公开(公告)号：US07935966B2
公开(公告)日：2011-05-03
申请号：US11813676
申请日：2006-01-18
IPC分类号： H01L29/04 , H01L31/0376 , H01L31/20 , H01L31/036
CPC分类号： H01L31/03529 , H01L31/022433 , H01L31/022441 , H01L31/0288 , H01L31/0745 , H01L31/0747 , H01L31/202 , Y02E10/50 , Y02P70/521
摘要： A semiconductor device including, on at least one surface of a crystalline semiconductor substrate, at least one first amorphous semiconductor region doped with a first type of conductivity. The semiconductor substrate includes, on the same at least one surface, at least one second amorphous semiconductor region doped with a second type of conductivity, opposite the first type of conductivity. The first amorphous semiconductor region, insulated for the second amorphous semiconductor region by at least ore dielectric region in the contact with the semiconductor substrate, and the second amorphous semiconductor region form an interdigitated structure.
摘要翻译： 一种半导体器件，在晶体半导体衬底的至少一个表面上包括掺杂有第一导电类型的至少一个第一非晶半导体区域。 半导体衬底在相同的至少一个表面上包括与第一类型的导电性相反的掺杂有第二类导电性的至少一个第二非晶半导体区域。 通过与半导体衬底接触的至少矿物电介质区域和第二非晶半导体区域绝缘的第一非晶半导体区域形成叉指结构。
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10.发明授权公开(公告)号：US07759231B2
公开(公告)日：2010-07-20
申请号：US11814690
申请日：2006-02-06
IPC分类号： H01L21/60
CPC分类号： H01L31/022425 , H01L31/02008 , Y02E10/50
摘要： A method of forming contacts between at least one metallic layer and at least one semiconductor substrate through at least one layer of dielectric in a semiconductor device. The semiconductor device includes, on at least one base face of the semiconductor substrate, the dielectric layer. The metallic layer is stacked on the dielectric layer. The heated ends of plural protruding elements assembled on a support are brought into contact with the metallic layer simultaneously, thereby creating zones of melted metal under the heated ends of the protruding elements. The melted metal traverses the dielectric and amalgamates with the semiconductor of the substrate at the level of the zones of melted metal, thereby creating the contacts.
摘要翻译： 一种通过半导体器件中的至少一层电介质在至少一个金属层与至少一个半导体衬底之间形成接触的方法。 所述半导体器件在所述半导体衬底的至少一个基面上包括所述电介质层。 金属层堆叠在电介质层上。 组装在支撑体上的多个突出元件的加热端同时与金属层接触，从而在突出元件的加热端部下产生熔融金属区域。 熔融的金属在熔融金属的区域的水平面上穿过介质和汞齐与基底的半导体，从而形成接触。
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