公开(公告)号：US09786652B2

公开(公告)日：2017-10-10

申请号：US14854366

申请日：2015-09-15

申请人： Rouying Zhan ,  Chai Ean Gill ,  Changsoo Hong ,  Michael H. Kaneshiro

发明人： Rouying Zhan ,  Chai Ean Gill ,  Changsoo Hong ,  Michael H. Kaneshiro

IPC分类号： H01L29/74 ,  H01L29/747 ,  H01L29/00 ,  H01L21/331 ,  H01L27/082 ,  H01L29/73 ,  H01L27/02 ,  H01L29/66 ,  H01L23/60 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

CPC分类号： H01L27/0259 ,  H01L23/60 ,  H01L27/0248 ,  H01L27/0262 ,  H01L27/082 ,  H01L29/0649 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/66234 ,  H01L29/6625 ,  H01L29/73 ,  H01L29/7317 ,  H01L2924/0002 ,  H01L2924/00

摘要： An ESD protection device is fabricated in a semiconductor substrate that includes a semiconductor layer having a first conductivity type. A first well implantation procedure implants dopant of a second conductivity type in the semiconductor layer to form inner and outer sinker regions. The inner sinker region is configured to establish a common collector region of first and second bipolar transistor devices. A second well implantation procedure implants dopant of the first conductivity type in the semiconductor layer to form respective base regions of the first and second bipolar transistor devices. Conduction of the first bipolar transistor device is triggered by breakdown between the inner sinker region and the base region of the first bipolar transistor device. Conduction of the second bipolar transistor device is triggered by breakdown between the outer sinker region and the base region of the second bipolar transistor device.

公开(公告)号：US20130279051A1

公开(公告)日：2013-10-24

申请号：US13451312

申请日：2012-04-19

申请人： Chai Ean Gill ,  Rouying Zhan

发明人： Chai Ean Gill ,  Rouying Zhan

IPC分类号： H02H9/04

CPC分类号： H01L27/0259 ,  H02H9/041

摘要： An area-efficient, high voltage, dual polarity ESD protection device (200) is provided for protecting multiple pins (30, 40) against ESD events by using a plurality of stacked NPN devices (38, 48, 39) which have separately controllable breakdown voltages and which share one or common NPN devices (39), thereby reducing the footprint of the high voltage ESD protection circuits without reducing robustness and functionality.

摘要翻译： 提供了一种区域高效，高电压，双极性ESD保护装置（200），用于通过使用多个堆叠的NPN装置（38,48,39）来保护多个针脚（30,40）免受ESD事件的影响，这些NPN装置具有分别可控的击穿 电压并且共享一个或公共NPN器件（39），从而减少高压ESD保护电路的覆盖，而不降低鲁棒性和功能性。

公开(公告)号：US08279566B2

公开(公告)日：2012-10-02

申请号：US12112209

申请日：2008-04-30

申请人： James D. Whitfield ,  Chai Ean Gill ,  Abhijat Goyal ,  Rouying Zhan

发明人： James D. Whitfield ,  Chai Ean Gill ,  Abhijat Goyal ,  Rouying Zhan

IPC分类号： H02H9/00

CPC分类号： H01L27/0248

摘要： An electrostatic discharge (ESD) clamp (41, 51, 61, 71, 81, 91), coupled across input-output (I/O) (22) and common (GND) (23) terminals of a protected semiconductor SC device or IC (24), comprises, an ESD transistor (ESDT) (25) with source-drain (26, 27) coupled between the GND (23) and I/O (22), a first resistor (30) coupled between gate (28) and source (26) and a second resistor (30) coupled between ESDT body (29) and source (26). Paralleling the resistors (30, 32) are control transistors (35, 35′) with gates (38, 38′) coupled to one or more bias supplies Vb, Vb′. The main power rail (Vdd) of the device or IC (24) is a convenient source for Vb, Vb′. When the Vdd is off during shipment, handling, equipment assembly, etc., the ESD trigger voltage Vt1 is low, thereby providing maximum ESD protection when ESD risk is high. When Vdd is energized, Vt1 rises to a value large enough to avoid interference with normal circuit operation but still protect from ESD events. Parasitic leakage through the ESDT (25) during normal operation is much reduced.

摘要翻译： 被保护半导体SC器件的输入输出（I / O）（22）和公共（GND）（23）端子耦合的静电放电（ESD）钳位（41,41,61,71,81,91） IC（24）包括耦合在GND（23）和I / O（22）之间的源极 - 漏极（26,27）的ESD晶体管（ESDT）（25），耦合在栅极 28）和源极（26）以及耦合在ESDT体（29）和源极（26）之间的第二电阻器（30）。 并联电阻器（30,32）是与一个或多个偏置电源Vb，Vb'耦合的门（38,38'）的控制晶体管（35,35'）。 设备或IC（24）的主电源轨（Vdd）是Vb，Vb'的方便源。 当Vdd在装运，处理，设备组装等时关闭时，ESD触发电压Vt1为低，从而在ESD风险高时提供最大的ESD保护。 当Vdd通电时，Vt1上升到足够大的值，以避免与正常电路操作的干扰，但仍然保护ESD事件。 在正常运行期间通过ESDT（25）的寄生泄漏大大减少。

公开(公告)号：US20120119331A1

公开(公告)日：2012-05-17

申请号：US12944931

申请日：2010-11-12

申请人： Amaury Gendron ,  Chai Ean Gill ,  Vadim A. Kushner ,  Rouying Zhan

发明人： Amaury Gendron ,  Chai Ean Gill ,  Vadim A. Kushner ,  Rouying Zhan

IPC分类号： H01L29/72 ,  H01L21/331

CPC分类号： H01L27/0262 ,  H01L29/87

摘要： An area-efficient, high voltage, single polarity ESD protection device (300) is provided which includes an p-type substrate (303); a first p-well (308-1) formed in the substrate and sized to contain n+ and p+ contact regions (310, 312) that are connected to a cathode terminal; a second, separate p-well (308-2) formed in the substrate and sized to contain only a p+ contact region (311) that is connected to an anode terminal; and an electrically floating n-type isolation structure (304, 306, 307-2) formed in the substrate to surround and separate the first and second semiconductor regions. When a positive voltage exceeding a triggering voltage level is applied to the cathode and anode terminals, the ESD protection device triggers an inherent thyristor into a snap-back mode to provide a low impedance path through the structure for discharging the ESD current.

摘要翻译： 提供一种区域高效，高电压，单极性的ESD保护装置（300），其包括p型衬底（303）; 第一p阱（308-1），其形成在所述衬底中并且尺寸设置成包含连接到阴极端子的n +和p +接触区域（310,312）; 形成在所述基板中并且尺寸仅包含连接到阳极端子的p +接触区域（311）的第二独立p阱（308-2） 以及形成在基板中以围绕和分离第一和第二半导体区域的电浮置n型隔离结构（304,306,307-2）。 当超过触发电压电平的正电压被施加到阴极和阳极端子时，ESD保护装置将固有的可控硅触发到快速恢复模式，以提供通过用于放电ESD电流的结构的低阻抗路径。

公开(公告)号：US20110175198A1

公开(公告)日：2011-07-21

申请号：US12956686

申请日：2010-11-30

申请人： Rouying Zhan ,  Amaury Gendron ,  Chai Ean Gill

发明人： Rouying Zhan ,  Amaury Gendron ,  Chai Ean Gill

IPC分类号： H01L29/73 ,  H01L21/331

CPC分类号： H01L21/8228 ,  H01L27/0259 ,  H01L29/66234

摘要： A stackable electrostatic discharge (ESD) protection clamp (21) for protecting a circuit core (24) comprises, a bipolar transistor (56, 58) having a base region (74, 51, 52, 85) with a base contact (77) therein and an emitter (78) spaced a lateral distance Lbe from the base contact (77), and a collector (80, 86, 762) proximate the base region (74, 51, 52, 85). The base region (74, 51, 52, 85) comprises a first portion (51) including the base contact (77) and emitter (78), and a second portion (52) with a lateral boundary (752) separated from the collector (86, 762) by a breakdown region (84) whose width D controls the clamp trigger voltage, the second portion (52) lying between the first portion (51) and the boundary (752). The damage-onset threshold current It2 of the ESD clamp (21) is improved by increasing the parasitic resistance Rbe of the emitter-base region (74, 51, 52, 85), by for example, increasing Lbe or decreasing the relative doping density of the first portion (51) or a combination thereof.

摘要翻译： 用于保护电路芯（24）的可堆叠静电放电（ESD）保护夹具（21）包括：具有基部接触（77）的基极区域（74,51,52,85）的双极晶体管（56,58） 以及与基部触点（77）间隔开横向距离Lbe的发射器（78）和靠近基部区域（74,51,52,85）的收集器（80,86,762）。 基部区域（74,51,52,85）包括包括基部触头（77）和发射极（78）的第一部分（51）和具有与集电器分离的侧边界（752）的第二部分（52） （86,762）由其宽度D控制钳位触发电压的击穿区域（84），第二部分（52）位于第一部分（51）和边界（752）之间。 通过增加发射极 - 基极区（74,51,52,85）的寄生电阻Rbe，例如增加Lbe或减小相对掺杂密度来改善ESD钳位（21）的损伤起始阈值电流It2 的第一部分（51）或其组合。

公开(公告)号：US09659922B2

公开(公告)日：2017-05-23

申请号：US13917580

申请日：2013-06-13

申请人： Rouying Zhan ,  Chai Ean Gill

发明人： Rouying Zhan ,  Chai Ean Gill

IPC分类号： H01L27/02

CPC分类号： H01L27/0262 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66234 ,  H02H9/046

摘要： An electrostatic discharge protection clamp includes a substrate and a first electrostatic discharge protection device over the substrate. The first electrostatic discharge protection device includes a buried layer over the substrate. The buried layer has a first region having a first doping concentration and a second region having a second doping concentration. The first doping concentration is greater than the second doping concentration. The first electrostatic discharge protection device includes a first transistor over the buried layer. The first transistor has an emitter coupled to a first cathode terminal of the electrostatic discharge protection clamp. The first electrostatic discharge protection device includes a second transistor over the buried layer. The second transistor has an emitter coupled to a first anode terminal of the electrostatic discharge protection clamp. A collector of the first transistor and a collector of the second transistor are over the first region of the buried layer.

公开(公告)号：US09583603B2

公开(公告)日：2017-02-28

申请号：US13764523

申请日：2013-02-11

申请人： Rouying Zhan ,  Chai Ean Gill ,  William G. Cowden ,  Changsoo Hong

发明人： Rouying Zhan ,  Chai Ean Gill ,  William G. Cowden ,  Changsoo Hong

IPC分类号： H01L29/73 ,  H01L29/66 ,  H01L27/02 ,  H01L29/78 ,  H01L29/735 ,  H01L29/06

CPC分类号： H01L29/73 ,  H01L27/0277 ,  H01L29/0653 ,  H01L29/66325 ,  H01L29/735 ,  H01L29/7835

摘要： An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.

摘要翻译： 静电放电（ESD）保护装置包括半导体衬底，半导体衬底中的基极区域，具有第一导电类型，基极区域中的发射极区域，具有第二导电类型，半导体衬底中的集电极区域间隔开 具有第二导电类型的具有第二导电类型的击穿触发区域横向设置在基极区域和集电极区域之间以限定发生击穿的结，以触发ESD保护装置以分流ESD放电 电流以及由击穿触发区域上的半导体衬底支撑并电连接到基极区域和发射极区域的栅极结构。 击穿触发区域的横向宽度被配置为建立发生击穿的电压电平。

公开(公告)号：US20160013177A1

公开(公告)日：2016-01-14

申请号：US14327191

申请日：2014-07-09

申请人： ROUYING ZHAN ,  CHAI EAN GILL

发明人： ROUYING ZHAN ,  CHAI EAN GILL

IPC分类号： H01L27/02 ,  H01L27/12 ,  H01L21/265 ,  H01L29/06 ,  H01L21/8222 ,  H01L21/84 ,  H01L29/08

CPC分类号： H01L27/0259 ,  H01L21/26513 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/732

摘要： ESD protection device structures and related fabrication methods are provided. An exemplary semiconductor protection device includes a first base well region having a first conductivity type, a collector region of the opposite conductivity type, and a second base well region having a dopant concentration greater than the first base well region, and a portion of the second base well region is disposed between the first base well region and the collector region. A third base well region with a different dopant concentration is disposed between the collector region and the second base well region. At least a portion of the first base well region is disposed between a base contact region and an emitter region within the second base well region.

摘要翻译： 提供ESD保护器件结构及相关制造方法。 示例性的半导体保护装置包括具有第一导电类型的第一基极阱区域，具有相反导电类型的集电极区域和具有大于第一基极阱区域的掺杂剂浓度的第二基极阱区域，以及第二基极阱区域的一部分 基极区域设置在第一基极阱区域和集电极区域之间。 具有不同掺杂浓度的第三基极阱区域设置在集电极区域和第二基极阱区域之间。 第一基极阱区域的至少一部分设置在第二基极阱区域内的基极接触区域和发射极区域之间。

公开(公告)号：US08994068B2

公开(公告)日：2015-03-31

申请号：US13599244

申请日：2012-08-30

申请人： Rouying Zhan ,  Chai E Gill ,  Changsoo Hong

发明人： Rouying Zhan ,  Chai E Gill ,  Changsoo Hong

IPC分类号： H01L29/66 ,  H01L23/62 ,  H01L27/02 ,  H01L21/425 ,  H01L29/87

CPC分类号： H01L29/87 ,  H01L27/0262

摘要： An electrostatic discharge protection clamp adapted to limit a voltage appearing across protected terminals of an integrated circuit to which the electrostatic discharge protection clamp is coupled is presented. The electrostatic discharge protection clamp includes a substrate, and a first electrostatic discharge protection device formed over the substrate. The first electrostatic discharge protection device includes a buried layer formed over the substrate, the buried layer having a first conductivity type and defining an opening located over a region of the substrate, a first transistor formed over the opening of the buried layer, the first transistor having an emitter coupled to a first cathode terminal of the electrostatic discharge protection clamp, and a second transistor formed over the buried layer, the second transistor having an emitter coupled to a first anode terminal of the electrostatic discharge protection clamp.

摘要翻译： 本发明提供了一种静电放电保护钳，其适用于限制出现在静电放电保护钳耦合到的集成电路的受保护端子上的电压。 静电放电保护夹具包括衬底和形成在衬底上的第一静电放电保护器件。 第一静电放电保护器件包括形成在衬底上的掩埋层，所述掩埋层具有第一导电类型并且限定位于衬底的区域上方的开口，形成在掩埋层的开口上的第一晶体管，第一晶体管 具有耦合到所述静电放电保护钳位件的第一阴极端子的发射极和形成在所述掩埋层上的第二晶体管，所述第二晶体管具有耦合到所述静电放电保护钳位件的第一阳极端子的发射极。

公开(公告)号：US20140367830A1

公开(公告)日：2014-12-18

申请号：US13917580

申请日：2013-06-13

申请人： Rouying Zhan ,  Chai Ean Gill

发明人： Rouying Zhan ,  Chai Ean Gill

IPC分类号： H01L27/02 ,  H01L21/8222 ,  H01L27/082

CPC分类号： H01L27/0262 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0804 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66234 ,  H02H9/046

摘要： An electrostatic discharge protection clamp includes a substrate and a first electrostatic discharge protection device over the substrate. The first electrostatic discharge protection device includes a buried layer over the substrate. The buried layer has a first region having a first doping concentration and a second region having a second doping concentration. The first doping concentration is greater than the second doping concentration. The first electrostatic discharge protection device includes a first transistor over the buried layer. The first transistor has an emitter coupled to a first cathode terminal of the electrostatic discharge protection clamp. The first electrostatic discharge protection device includes a second transistor over the buried layer. The second transistor has an emitter coupled to a first anode terminal of the electrostatic discharge protection clamp. A collector of the first transistor and a collector of the second transistor are over the first region of the buried layer.

摘要翻译： 静电放电保护夹具包括衬底和衬底上的第一静电放电保护器件。 第一静电放电保护器件包括衬底上的掩埋层。 掩埋层具有具有第一掺杂浓度的第一区域和具有第二掺杂浓度的第二区域。 第一掺杂浓度大于第二掺杂浓度。 第一静电放电保护器件包括在掩埋层上的第一晶体管。 第一晶体管具有耦合到静电放电保护钳的第一阴极端子的发射极。 第一静电放电保护器件包括在掩埋层上的第二晶体管。 第二晶体管具有耦合到静电放电保护夹的第一阳极端子的发射极。 第一晶体管的集电极和第二晶体管的集电极在掩埋层的第一区域之上。