Abstract:
Embodiments of the invention relate to methods of presenting personalized search results pages to users, and to search engine systems and servers configured to implement such methods. For example, a method of presenting such a page to a user of a search engine includes steps of computing an engagement index of the user based on the distribution in time of that user's interactions with the search engine then presenting, in response to a query by the user, a personalized search results page to the user.
Abstract:
Methods and apparatus are described by which “superphrases” of “seed phrases” representing basic concepts may be identified without having to compare all possible pairs of seed and candidate phrases. According to one class of embodiments, a data structure similar to an inverted index is used for indexing phrases. The elimination of seed and candidate phrase pairs is enabled by building and traversing the index in a particular manner.
Abstract:
A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces.The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.
Abstract:
A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymmetric memory component. The symmetric memory component within the main memory of the computer system is configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component during the writing of that address. The asymmetric memory component is configured to enable block write operations in which writing to an address within a region of the asymmetric memory component affects the availability of other addresses within the region of the asymmetric memory component during the block write operations involving the address.
Abstract:
Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.
Abstract:
Methods and apparatus are described by which “superphrases” of “seed phrases” representing basic concepts may be identified without having to compare all possible pairs of seed and candidate phrases. According to one class of embodiments, a data structure similar to an inverted index is used for indexing phrases. The elimination of seed and candidate phrase pairs is enabled by building and traversing the index in a particular manner.
Abstract:
A command from an application is received to access a data structure associated with one or more virtual addresses mapped to main memory. A first subset of the virtual addresses for the data structure having constituent addresses that are mapped to the symmetric memory components and a second subset of the virtual addresses for the data structure having constituent addresses that are mapped to the asymmetric memory components are identified. Data associated with the virtual address from the first physical addresses and data associated with the virtual addresses from the second physical addresses are accessed. The data associated with the symmetric and asymmetric memory components is accessed by the application without providing the application with an indication of whether the data is accessed within the symmetric memory component or the asymmetric memory component.
Abstract:
The present invention provides techniques for determining user segments to increase the reach of targeted advertisements. The user segments may be determined based on factors including an advertisement category, user interest categories, and historical advertisement performance metrics associated with performance of advertisements of a relevant category in connection with various user segments. User segments may be identified that substantially increase reach while yet being anticipated to preserve, or sufficiently preserve, advertisement performance as compared with performance associated with an initially targeted user segment. Recommendations may be provided accordingly to advertisers, or automatically provided, as well as implemented, or automatically implemented.
Abstract:
A memory controller writes to a virtual address associated with data residing within an asymmetric memory component of main memory that is within a computer system and that has a symmetric memory component, while preserving proximate other data residing within the asymmetric memory component. The symmetric memory component within the main memory of the computer system is configured to enable random access write operations in which an address within a block of the symmetric memory component is written without affecting the availability of other addresses within the block of the symmetric memory component during the writing of that address. The asymmetric memory component is configured to enable block write operations in which writing to an address within a region of the asymmetric memory component affects the availability of other addresses within the region of the asymmetric memory component during the block write operations involving the address.
Abstract:
Data stored within symmetric and asymmetric memory components of main memory is integrated by identifying a first data as having access characteristics suitable for storing in an asymmetric memory component. The first data is included among a collection of data to be written to the asymmetric memory component. An amount of data is identified within the collection of data to be written to the asymmetric memory component. The amount of data is compared within the collection of data to a volume threshold to determine whether a block write to the asymmetric memory component is justified by the amount of data. If justified, the collection of data is loaded to the asymmetric memory component.