公开(公告)号：US20100038676A1

公开(公告)日：2010-02-18

申请号：US12177258

申请日：2008-07-22

申请人： Anco Heringa ,  Raymond J.E. Hueting ,  Jan W. Slotboom

发明人： Anco Heringa ,  Raymond J.E. Hueting ,  Jan W. Slotboom

IPC分类号： H01L29/74

CPC分类号： H01L29/7802 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/402 ,  H01L29/408 ,  H01L29/73 ,  H01L29/732 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7824 ,  H01L29/861

摘要： A semiconductor device includes a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device. The field shaping region is coupled via capacitive voltage coupling regions to substantially the same voltages as are applied to the pn junction. When a reverse voltage is applied across the pn junction and the device is non-conducting, a capacitive electric field is present in a part of the field shaping region which extends beyond a limit of the pn junction depletion region which would exist in the absence of the field shaping region. The electric field in the field shaping region inducing a stretched electric field limited to a correspondingly stretched pn junction depletion region in the semiconductor region.

摘要翻译： 半导体器件包括具有pn结的半导体区域和位于pn结附近的场整形区域，以增加器件的反向击穿电压。 场整形区域经由电容性电压耦合区域耦合到与施加到pn结的基本相同的电压。 当在pn结上施加反向电压并且器件不导通时，在场成形区域的一部分中存在电容电场，其延伸超过不存在pn结区域的pn结耗尽区的极限 场整形区域。 场成形区域中的电场引起限制在半导体区域中相应延伸的pn结耗尽区的拉伸电场。

公开(公告)号：US06359308B1

公开(公告)日：2002-03-19

申请号：US09624481

申请日：2000-07-24

申请人： Erwin A. Hijzen ,  Raymond J.E. Hueting

发明人： Erwin A. Hijzen ,  Raymond J.E. Hueting

IPC分类号： H01L2976

CPC分类号： H01L29/7813 ,  H01L29/0661 ,  H01L29/407 ,  H01L29/41741 ,  H01L29/42368 ,  H01L29/66734 ,  H01L29/7808 ,  H01L29/7811

摘要： A cellular trench-gate field-effect transistor comprises a field plate (38) on dielectric material (28) in a perimeter trench (18). The dielectric material (28) forms a thicker dielectric layer than the gate dielectric layer (21) in the array trenches (11). The field plate (38) is connected to the source (3) or trench-gate (31) of the transistor and acts inwardly towards the cellular array rather than outwardly towards the body perimeter (15) because of its presence on the inside wall 18a of the trench (18) without acting on any outside wall (18b). The array and perimeter trenches (11,18) are sufficiently closely spaced, and the intermediate areas (4a, 4b) of the drain drift region (4) are sufficiently lowly doped, that the depletion layer (40) formed in the drain drift region (4) in the blocking state of the transistor depletes the whole of these intermediate areas between neighbouring trenches at a voltage less than the breakdown voltage. This arrangement reduces the risk of premature breakdown that can occur at high field points in the depletion layer (40), especially at the perimeter of the cellular array.

摘要翻译： 蜂窝状沟槽栅极场效应晶体管包括在周边沟槽（18）中的电介质材料（28）上的场板（38）。 电介质材料（28）形成比阵列沟槽（11）中的栅介质层（21）更厚的电介质层。 场板（38）连接到晶体管的源极（3）或沟槽栅极（31）并且向内朝向蜂窝阵列作用，而不是向外朝向主体周边（15），因为其存在于内壁18a上 的沟槽（18），而不作用在任何外壁（18b）上。 阵列和周边沟槽（11,18）足够紧密地间隔开，并且漏极漂移区域（4）的中间区域（4a，4b）被充分地低掺杂，在漏极漂移区域中形成的耗尽层（40） （4）在晶体管的截止状态下，以小于击穿电压的电压消耗相邻沟槽之间的这些中间区域的全部。 这种布置降低了可能在耗尽层（40）中的高场点发生的过早击穿的风险，特别是在蜂窝阵列的周边。