公开(公告)号：US20240290774A1

公开(公告)日：2024-08-29

申请号：US18658471

申请日：2024-05-08

申请人： Nuvoton Technology Corporation Japan

发明人： Kazumi TSUTSUMIDA ,  Katsuyoshi JOKYU ,  Keiichi MURAYAMA

IPC分类号： H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L29/866

CPC分类号： H01L27/0255 ,  H01L29/0692 ,  H01L29/7808 ,  H01L29/866

摘要： A semiconductor device manufacturing method includes: forming a first groove having depth H in a semiconductor layer; filling the first groove with an oxide film and forming a surface oxide film having thickness a on an upper surface of the semiconductor layer to equalize the oxide film and the surface oxide film in height; forming a second groove having depth h greater than thickness a, from an uppermost surface of a third oxide film; forming gate trenches deeper than depth H, in the semiconductor layer; depositing polysilicon until at least the gate trenches and the second groove are filled with polysilicon;
forming a peripheral element by injecting an impurity into polysilicon deposited in the second groove; and making a thickness of the peripheral element equal to depth h by concurrently removing polysilicon deposited in the gate trenches and polysilicon deposited in the second groove until they become equal in height.

公开(公告)号：US11955544B2

公开(公告)日：2024-04-09

申请号：US17454433

申请日：2021-11-10

申请人： ROHM CO., LTD.

发明人： Kentaro Nasu

IPC分类号： H01L29/78 ,  H01L27/02 ,  H01L29/16 ,  H01L29/417 ,  H01L29/423 ,  H01L29/866

CPC分类号： H01L29/7808 ,  H01L27/0251 ,  H01L27/0255 ,  H01L29/16 ,  H01L29/41758 ,  H01L29/4238 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/866

摘要： A semiconductor device includes a semiconductor layer that has a transistor structure including a p type source region, a p type drain region, an n type body region between the p type source region and the p type drain region, and a gate electrode facing the n type body region and a voltage-regulator diode that is disposed at the semiconductor layer and that has an n type portion connected to the p type source region and a p type portion connected to the gate electrode, in which the transistor structure and the voltage-regulator diode are unified into a single-chip configuration.

公开(公告)号：US11855184B2

公开(公告)日：2023-12-26

申请号：US17337596

申请日：2021-06-03

申请人： Magnachip Semiconductor, Ltd.

发明人： Soo Chang Kang ,  Seong Jo Hong

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/78 ,  H01L21/768 ,  H01L29/417 ,  H01L27/02 ,  H01L21/266 ,  H01L29/739 ,  H01L29/866

CPC分类号： H01L29/66734 ,  H01L21/76897 ,  H01L27/0255 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/7808 ,  H01L29/7813 ,  H01L21/266 ,  H01L29/7397 ,  H01L29/866

摘要： A method for manufacturing a power semiconductor device includes forming a drift region in a substrate, forming a trench in the drift region, forming a gate insulating layer in the trench, depositing a conductive material on the substrate, forming a gate electrode in the trench, forming a body region in the substrate, forming a highly doped source region in the body region, forming an insulating layer that covers the gate electrode, etching the insulating layer to open the body region, implanting a dopant into a portion of the body region to form a highly doped body contact region, so that the highly doped source region and the highly doped body contact region are alternately formed in the body region; and forming a source electrode on the highly doped body contact region and the highly doped source region.

公开(公告)号：US20180226495A1

公开(公告)日：2018-08-09

申请号：US15790484

申请日：2017-10-23

申请人： Magnachip Semiconductor, Ltd.

发明人： Soo Chang KANG ,  Seong Jo HONG

IPC分类号： H01L29/66 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/417 ,  H01L29/78 ,  H01L21/768

CPC分类号： H01L29/66734 ,  H01L21/266 ,  H01L21/76897 ,  H01L27/0255 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/41741 ,  H01L29/7397 ,  H01L29/7808 ,  H01L29/7813 ,  H01L29/866

摘要： A method for manufacturing a power semiconductor device includes forming a drift region in a substrate, forming a trench in the drift region, forming a gate insulating layer in the trench, depositing a conductive material on the substrate, forming a gate electrode in the trench, forming a body region in the substrate, forming a highly doped source region in the body region, forming an insulating layer that covers the gate electrode, etching the insulating layer to open the body region, implanting a dopant into a portion of the body region to form a highly doped body contact region, so that the highly doped source region and the highly doped body contact region are alternately formed in the body region; and forming a source electrode on the highly doped body contact region and the highly doped source region.

公开(公告)号：US20170278837A1

公开(公告)日：2017-09-28

申请号：US15080639

申请日：2016-03-25

申请人： Force Mos Technology Co., Ltd

发明人： Fu-Yuan HSIEH

IPC分类号： H01L27/02 ,  H01L29/66 ,  H01L23/535 ,  H01L23/532 ,  H01L29/40 ,  H01L29/78

CPC分类号： H01L27/0255 ,  H01L23/53266 ,  H01L23/535 ,  H01L29/407 ,  H01L29/66734 ,  H01L29/7805 ,  H01L29/7808 ,  H01L29/7813

摘要： A semiconductor power device having shielded gate structure in an active area and having ESD clamp diode with two poly-silicon layer process is disclosed, wherein: the shielded gate structure comprises a first poly-silicon layer to serve as a shielded electrode and a second poly-silicon layer to serve as a gate electrode, and the ESD clamp diode formed between two protruding electrodes is also formed by the first poly-silicon layer. A mask specially used to define the ESD clamp diode portion is saved.

公开(公告)号：US20170194492A9

公开(公告)日：2017-07-06

申请号：US14037205

申请日：2013-09-25

申请人： Madhur Bobde

发明人： Madhur Bobde

IPC分类号： H01L29/78 ,  H01L29/70 ,  H01L29/66

CPC分类号： H01L29/7827 ,  H01L21/8249 ,  H01L27/0716 ,  H01L29/66234 ,  H01L29/6628 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/70 ,  H01L29/732 ,  H01L29/7327 ,  H01L29/7804 ,  H01L29/7808 ,  H01L29/781 ,  H01L29/7813

摘要： A low voltage transient voltage suppressing (TVS) device supported on a semiconductor substrate supporting an epitaxial layer to form a bottom-source metal oxide semiconductor field effect transistor (BS-MOSFET) that comprises a trench gate surrounded by a drain region encompassed in a body region disposed near a top surface of the semiconductor substrate. The drain region interfaces with the body region constituting a junction diode. The drain region on top of the epitaxial layer constituting a bipolar transistor with a top electrode disposed on the top surface of the semiconductor functioning as a drain/collector terminal and a bottom electrode disposed on a bottom surface of the semiconductor substrate functioning as a source/emitter electrode. The body regions further comprises a surface body contact region electrically connected to a body-to-source short-connection thus connecting the body region to the bottom electrode functioning as the source/emitter terminal.

公开(公告)号：US09576841B2

公开(公告)日：2017-02-21

申请号：US15174366

申请日：2016-06-06

申请人： ROHM CO., LTD.

发明人： Kenichi Yoshimochi

IPC分类号： H01L21/762 ,  H01L29/739 ,  H01L29/866 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L23/482 ,  H01L27/06 ,  H01L21/763 ,  H01L27/02 ,  H01L27/118 ,  H01L29/40 ,  H01L29/423 ,  H01L29/08 ,  H01L23/00

CPC分类号： H01L21/76237 ,  H01L21/76205 ,  H01L21/763 ,  H01L23/4824 ,  H01L24/03 ,  H01L24/05 ,  H01L24/48 ,  H01L24/49 ,  H01L24/94 ,  H01L27/0207 ,  H01L27/0629 ,  H01L27/0635 ,  H01L27/0664 ,  H01L27/11896 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66106 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/866 ,  H01L2224/02166 ,  H01L2224/0345 ,  H01L2224/036 ,  H01L2224/039 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05559 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/0603 ,  H01L2224/4911 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2224/03 ,  H01L2924/01029 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device includes a first-conductivity-type semiconductor layer including an active region in which a transistor having impurity regions is formed and a marginal region surrounding the active region, a second-conductivity-type channel layer formed between the active region and the marginal region and forming a front surface of the semiconductor layer, at least one gate trench formed in the active region to extend from the front surface of the semiconductor layer through the channel layer, a gate insulation film formed on an inner surface of the gate trench, a gate electrode formed inside the gate insulation film in the gate trench, and at least one isolation trench arranged between the active region and the marginal region to surround the active region and extending from the front surface of the semiconductor layer through the channel layer, the isolation trench having a depth equal to that of the gate trench.

摘要翻译： 半导体器件包括：第一导电型半导体层，包括其中形成有杂质区的晶体管的有源区和围绕有源区的边缘区;形成在有源区和边界之间的第二导电型沟道层; 形成半导体层的前表面，形成在有源区中的至少一个栅极沟槽，以从半导体层的前表面延伸通过沟道层，形成在栅极沟槽的内表面上的栅极绝缘膜， 形成在栅极沟槽中的栅极绝缘膜内部的栅极电极，以及布置在有源区域和边缘区域之间的至少一个隔离沟槽，以围绕有源区域并且从半导体层的前表面延伸穿过沟道层， 隔离沟槽的深度等于栅极沟槽的深度。

公开(公告)号：USRE46311E1

公开(公告)日：2017-02-14

申请号：US14645251

申请日：2015-03-11

申请人： KABUSHIKI KAISHA TOSHIBA

发明人： Yusuke Kawaguchi

IPC分类号： H01L29/788 ,  H01L29/78 ,  H01L29/423 ,  H01L29/06 ,  H01L29/40

CPC分类号： H01L29/7813 ,  H01L29/0626 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/7805 ,  H01L29/7808

摘要： According to one embodiment, a semiconductor device, includes an element unit including a vertical-type MOSFET, the vertical-type MOSFET in including a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a fourth semiconductor layer, a fifth semiconductor layer sequentially stacked in order, an impurity concentration of the second semiconductor layer being lower than the first semiconductor layer, an insulator covering inner surfaces of a plurality of trenches, the adjacent trenches being provided with a first interval in between, and a diode unit including basically with the units of the element unit, the adjacent trenches being provided with a second interval in between, the second interval being larger than the first interval.

摘要翻译： 根据一个实施例，半导体器件包括包括垂直型MOSFET的元件单元，包括第一半导体层的垂直型MOSFET，第二半导体层，第三半导体层，第四半导体层，第五半导体层 层，所述第二半导体层的杂质浓度低于所述第一半导体层，绝缘体覆盖多个沟槽的内表面，所述相邻沟槽之间设置有第一间隔，二极管单元包括： 基本上与元件单元的单元相邻，相邻沟槽之间设置有第二间隔，第二间隔大于第一间隔。

公开(公告)号：US20170040445A1

公开(公告)日：2017-02-09

申请号：US15333430

申请日：2016-10-25

申请人： Renesas Electronics Corporation

发明人： Yoshito NAKAZAWA ,  Yuji YATSUDA

IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L29/49 ,  H01L29/06 ,  H01L29/40 ,  H01L29/423

CPC分类号： H01L29/7808 ,  H01L21/28008 ,  H01L21/28556 ,  H01L27/0255 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/456 ,  H01L29/4916 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813

摘要： A semiconductor device having a field-effect transistor, including a trench in a semiconductor substrate, a first insulating film in the trench, an intrinsic polycrystalline silicon film over the first insulating film, and first conductivity type impurities in the intrinsic polycrystalline silicon film to form a first conductive film. The first conductive film is etched to form a first gate electrode in the trench. A second insulating film is also formed in the trench above the first insulating film and the first gate electrode, and a first conductivity type doped polycrystalline silicon film, having higher impurity concentration than the first gate electrode is formed over the second insulating film. The doped polycrystalline silicon film is provided in an upper part of the trench to form a second gate electrode.

摘要翻译： 一种具有场效应晶体管的半导体器件，包括半导体衬底中的沟槽，沟槽中的第一绝缘膜，第一绝缘膜上的本征多晶硅膜，以及本征多晶硅膜中的第一导电型杂质，以形成 第一导电膜。 蚀刻第一导电膜以在沟槽中形成第一栅电极。 在第二绝缘膜上形成有在第一绝缘膜和第一栅电极上方的沟槽中的第二绝缘膜，并且在第二绝缘膜上形成杂质浓度高于第一栅电极的第一导电型掺杂多晶硅膜。 掺杂多晶硅膜设置在沟槽的上部，以形成第二栅电极。

公开(公告)号：US09461030B2

公开(公告)日：2016-10-04

申请号：US14485554

申请日：2014-09-12

申请人： FUJI ELECTRIC CO., LTD.

发明人： Takeyoshi Nishimura

IPC分类号： H01L29/66 ,  H01L27/02 ,  H01L29/94 ,  H01L49/02 ,  H01L27/06 ,  H01L29/866 ,  H01L29/78 ,  H01L29/739 ,  H01L29/06

CPC分类号： H01L27/0255 ,  H01L27/0629 ,  H01L28/60 ,  H01L29/0696 ,  H01L29/66348 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7803 ,  H01L29/7804 ,  H01L29/7808 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/866 ,  H01L29/94

摘要： A capacitive component region is formed below a temperature detecting diode or below a protective diode. In addition, the capacitive component region is formed below an anode metal wiring line connecting the temperature detecting diode and an anode electrode pad and below a cathode metal wiring line connecting the temperature detecting diode and a cathode electrode pad. The capacitive component region is an insulating film interposed between polysilicon layers. Specifically, a first insulating film, a polysilicon conductive layer, and a second insulating film are sequentially formed on a first main surface of a semiconductor substrate, and the temperature detecting diode, the protective diode, the anode metal wiring line, or the cathode metal wiring line is formed on the upper surface of the second insulating film. Therefore, it is possible to improve the static electricity resistance of the temperature detecting diode or the protective diode.

摘要翻译： 电容分量区形成在温度检测二极管的下方或保护二极管的下方。 此外，电容分量区域形成在连接温度检测二极管和阳极电极焊盘的阳极金属布线下方以及连接温度检测二极管和阴极电极焊盘的阴极金属布线的下方。 电容分量区域是介于多晶硅层之间的绝缘膜。 具体地，在半导体衬底的第一主表面上依次形成第一绝缘膜，多晶硅导电层和第二绝缘膜，并且温度检测二极管，保护二极管，阳极金属布线或阴极金属 布线在第二绝缘膜的上表面上形成。 因此，可以提高温度检测二极管或保护二极管的静电电阻。