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公开(公告)号：US08779598B2
公开(公告)日：2014-07-15
申请号：US13170820
申请日：2011-06-28
IPC分类号： H01L21/00 , H01L21/30 , H01L21/4763 , H01L23/52
CPC分类号： H01L21/6835 , H01L21/4857 , H01L23/145 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2221/68381 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/00014 , H01L2924/12042 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments described herein provide a method of manufacturing integrated circuit (IC) devices. The method includes coupling a first surface of a first intermediate substrate to a first surface of a second intermediate substrate, forming a first plurality of patterned metal layers on a second surface of the first intermediate substrate to form a first substrate and a second plurality of patterned metal layers on a second surface of the second intermediate substrate to form a second substrate, and separating the first and second substrates. Each of the first substrate and the second substrate is configured to facilitate electrical interconnection between a respective IC die and a respective printed circuit board (PCB).
摘要翻译： 本文描述的实施例提供了一种制造集成电路（IC）装置的方法。 该方法包括将第一中间衬底的第一表面耦合到第二中间衬底的第一表面，在第一中间衬底的第二表面上形成第一多个图案化金属层以形成第一衬底和第二多个图案化 在第二中间基板的第二表面上的金属层，以形成第二基板，并分离第一和第二基板。 第一基板和第二基板中的每一个被配置为便于相应的IC管芯和相应的印刷电路板（PCB）之间的电互连。
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公开(公告)号：US20130001791A1
公开(公告)日：2013-01-03
申请号：US13170820
申请日：2011-06-28
CPC分类号： H01L21/6835 , H01L21/4857 , H01L23/145 , H01L23/49827 , H01L24/16 , H01L24/32 , H01L24/48 , H01L24/73 , H01L2221/68345 , H01L2221/68381 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/73265 , H01L2924/00014 , H01L2924/12042 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Embodiments described herein provide a method of manufacturing integrated circuit (IC) devices. The method includes coupling a first surface of a first intermediate substrate to a first surface of a second intermediate substrate, forming a first plurality of patterned metal layers on a second surface of the first intermediate substrate to form a first substrate and a second plurality of patterned metal layers on a second surface of the second intermediate substrate to form a second substrate, and separating the first and second substrates. Each of the first substrate and the second substrate is configured to facilitate electrical interconnection between a respective IC die and a respective printed circuit board (PCB).
摘要翻译： 本文描述的实施例提供了一种制造集成电路（IC）装置的方法。 该方法包括将第一中间衬底的第一表面耦合到第二中间衬底的第一表面，在第一中间衬底的第二表面上形成第一多个图案化金属层以形成第一衬底和第二多个图案化 在第二中间基板的第二表面上的金属层，以形成第二基板，并分离第一和第二基板。 第一基板和第二基板中的每一个被配置为便于相应的IC管芯和相应的印刷电路板（PCB）之间的电互连。
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公开(公告)号：US20130000968A1
公开(公告)日：2013-01-03
申请号：US13173689
申请日：2011-06-30
CPC分类号： H05K3/184 , H05K3/242 , H05K3/428 , H05K2201/10378 , H05K2203/0733 , Y10T29/49155 , Y10T29/49165
摘要： A method of manufacturing a printed circuit board is disclosed. A conductive metal layer is formed on a first surface of a dielectric substrate. One or more vias are formed through the substrate. A conductive metal layer is formed on the first surface of the substrate and is patterned to form conductive traces on the first surface of the substrate. A plating mask is formed on the second surface of the substrate. One or more openings are formed in the plating mask to correspond to the location of the via(s). Conductive metal is deposited in the via(s) sufficient to substantially fill the via(s) and make contact with the conductive metal layer on the first surface and substantially to the level of the plating mask. The plating mask is removed from the substrate such that one or more conductive posts extend outwardly from the second surface of the substrate.
摘要翻译： 公开了一种制造印刷电路板的方法。 在电介质基板的第一表面上形成导电金属层。 通过衬底形成一个或多个通孔。 导电金属层形成在衬底的第一表面上，并被图案化以在衬底的第一表面上形成导电迹线。 在基板的第二表面上形成电镀掩模。 在电镀掩模中形成一个或多个开口以对应于通孔的位置。 导电金属沉积在足以基本上填充通孔的通孔中，并与第一表面上的导电金属层接触并且基本上与电镀掩模的水平面接触。 电镀掩模从衬底移除，使得一个或多个导电柱从衬底的第二表面向外延伸。
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