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公开(公告)号：US20080089365A1
公开(公告)日：2008-04-17
申请号：US11931104
申请日：2007-10-31
申请人： Wayne Bretl , Richard Citta , Mark Fimoff
发明人： Wayne Bretl , Richard Citta , Mark Fimoff
IPC分类号： H04J3/04
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
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2.发明申请Apparatus For And Method Of Controlling Sampling Frequency And Sampling Phase Of A Sampling Device 有权一种采样设备采样频率和采样相位的控制方法及方法公开(公告)号：US20080008280A1
公开(公告)日：2008-01-10
申请号：US11547819
申请日：2005-04-08
申请人： Jilian Zhu , Richard Citta , Scott Lopresto , David Willming , Shidong Chen
发明人： Jilian Zhu , Richard Citta , Scott Lopresto , David Willming , Shidong Chen
IPC分类号： H04L7/00
CPC分类号： H04L25/03057 , H04L7/0062 , H04L25/0212 , H04L2025/0342 , H04L2025/0349
摘要： A method of controlling sampling frequency and sampling phase of a sampling device from a value generated by an equalizer coupled to the sampling device includes the steps of generating a complex representation of the value developed by the equalizer and generating a representation of a decision from an output of the equalizer. The complex representation and the decision representation are correlated to obtain a sampling error estimate. The sampling error estimate is used to adjust the sampling frequency and sampling phase of the sampling device.
摘要翻译： 根据耦合到采样装置的均衡器产生的值来控制采样装置的采样频率和采样相位的方法包括以下步骤：产生由均衡器开发的值的复数表示，并从输出端生成决策的表示 的均衡器。 复数表示和决策表示相关，以获得抽样误差估计。 采样误差估计用于调整采样设备的采样频率和采样相位。
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公开(公告)号：US20060215748A1
公开(公告)日：2006-09-28
申请号：US11400039
申请日：2006-04-07
申请人： Jingsong Xia , Richard Citta , Scott LoPresto , Wenjun Zhang
发明人： Jingsong Xia , Richard Citta , Scott LoPresto , Wenjun Zhang
IPC分类号： H03H7/30
CPC分类号： H04L25/03057
摘要： A digital equalizer comprises a matched filter that, in conjunction with an FIR filter, assures a single peak with substantially greater energy than other peaks caused by ghosts, thereby permitting synchronization even with multiple, arbitrarily strong ghosts caused by strong multipathing, multiple transmitters, or both.
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公开(公告)号：US20080107171A1
公开(公告)日：2008-05-08
申请号：US11931269
申请日：2007-10-31
申请人： Wayne Bretl , Richard Citta , Mark Fimoff
发明人： Wayne Bretl , Richard Citta , Mark Fimoff
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
摘要翻译： 根据第一交错，正常排序的鲁棒VSB数据被重新排序以产生重排序的鲁棒VSB数据。 根据第二交错重新排序的稳健VSB数据和ATSC数据被重新排序以产生正常排序的鲁棒VSB数据和重新排序的ATSC数据。 通常排序稳健的VSB数据和重新排序的ATSC数据被时分复用以传输到接收机。 接收机根据接收机类型或用户选择丢弃重新排序的ATSC数据或正常排序的鲁棒VSB数据。 稳健的VSB接收机能够处理在外部解码器上游的正常排序的鲁棒VSB数据，而不会产生交错，从而避免与交织相关联的延迟。
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公开(公告)号：US20080089430A1
公开(公告)日：2008-04-17
申请号：US11931323
申请日：2007-10-31
申请人： Wayne Bretl , Richard Citta , Mark Fimoff
发明人： Wayne Bretl , Richard Citta , Mark Fimoff
IPC分类号： H04N11/04
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
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公开(公告)号：US20060159214A1
公开(公告)日：2006-07-20
申请号：US11318265
申请日：2005-12-23
申请人： Richard Citta , Scott LoPresto , Jingsong Xia , Wenjun Zhang
发明人： Richard Citta , Scott LoPresto , Jingsong Xia , Wenjun Zhang
IPC分类号： H03D3/24
CPC分类号： H03L7/087 , H03L7/093 , H04L27/38 , H04L2027/0057
摘要： A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.
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公开(公告)号：US20050152411A1
公开(公告)日：2005-07-14
申请号：US11076560
申请日：2005-03-09
申请人： Wayne Breti , Richard Citta , Mark Fimoff
发明人： Wayne Breti , Richard Citta , Mark Fimoff
IPC分类号： H03M13/25 , H03M13/39 , H04L1/00 , H04L25/03 , H04L25/06 , H04L25/497 , H04L27/02 , H04L27/06 , H04N5/04 , H04N5/44 , H04N5/455 , H04N19/895 , G06F12/00
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
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8.发明申请Data-directed frequency-and-phase lock loop for decoding an offset-QAM modulated signal having a pilot 有权用于解码具有导频的偏移-QAM调制信号的数据定向的频相锁相环公开(公告)号：US20050074082A1
公开(公告)日：2005-04-07
申请号：US10404553
申请日：2003-04-01
申请人： Richard Citta , Scott LoPresto , Jingsong Xia , Wenjun Zhang
发明人： Richard Citta , Scott LoPresto , Jingsong Xia , Wenjun Zhang
IPC分类号： H03D3/24 , H04B20060101 , H04L27/00 , H04L27/38
CPC分类号： H04L27/38 , H03L7/093 , H03L7/185 , H04L2027/0057 , H04L2027/0089
摘要： A data-and-pilot directed frequency-and-phase lock loop for an offset-QAM modulated signal having a pilot signal comprises a pilot acquisition loop and a pair of data-directed acquisition loops. The pilot is extracted from the main signal by a pilot filter, then used both by the pilot acquisition loop and to remove the pilot from the signal to the data-directed acquisition loops. The outputs of the pilot and the two data-directed acquisition loops are summed and returned to the VCO to complete the feedback loop.
摘要翻译： 用于具有导频信号的偏移-QAM调制信号的数据和导频定向的频相锁相环包括导频采集环路和一对数据定向采集环路。 通过导频滤波器从主信号中提取导频，然后由导频采集环路使用，并将导频从信号中去除到数据导向采集环路。 导频和两个数据导向采集环路的输出相加并返回到VCO，以完成反馈环路。
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公开(公告)号：US20080092012A1
公开(公告)日：2008-04-17
申请号：US11931357
申请日：2007-10-31
申请人： Wayne Bretl , Richard Citta , Mark Fimoff
发明人： Wayne Bretl , Richard Citta , Mark Fimoff
IPC分类号： G06F11/07
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
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公开(公告)号：US20080089415A1
公开(公告)日：2008-04-17
申请号：US11930746
申请日：2007-10-31
申请人： Wayne Bretl , Richard Citta , Mark Fimoff
发明人： Wayne Bretl , Richard Citta , Mark Fimoff
IPC分类号： H04N7/24
CPC分类号： H04L25/03312 , H03M13/253 , H03M13/256 , H03M13/2732 , H03M13/2936 , H03M13/2957 , H03M13/6331 , H04L1/0041 , H04L1/0047 , H04L1/0054 , H04L1/0057 , H04L1/006 , H04L1/0065 , H04L1/007 , H04L1/0071 , H04L25/03267 , H04L25/03318 , H04L25/063 , H04L25/497 , H04L27/02 , H04L27/066 , H04L2025/03382 , H04N5/04 , H04N5/4401 , H04N5/455 , H04N21/23614 , H04N21/2383 , H04N21/4348 , H04N21/4382
摘要： Normally ordered robust VSB data are reordered in accordance with a first interleave to produce reordered robust VSB data. The reordered robust VSB data and ATSC data are reordered in accordance with a second interleave to produce normally ordered robust VSB data and reordered ATSC data. The normally ordered robust VSB data and reordered ATSC data are time multiplexed for transmission to a receiver. The receiver discards the reordered ATSC data or the normally ordered robust VSB data depending upon receiver type or user selection. A robust VSB receiver is able to process the normally ordered robust VSB data upstream of an outer decoder without an interleave thereby avoiding the delay associated with an interleave.
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