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1.发明授权Network independent clocking circuit which allows a synchronous master to be connected to a circuit switched data adapter 失效网络独立的时钟电路，允许同步主机连接到电路交换数据适配器
公开(公告)号：US5140616A
公开(公告)日：1992-08-18
申请号：US615524
申请日：1990-11-19
申请人： Robert E. Renner
发明人： Robert E. Renner
IPC分类号： H04J3/06
CPC分类号： H04J3/0676
摘要： In order to accomplish the object of the present invention there is provided a network independent clocking (NIC) circuit which allows a local synchronous master to exchange data with a local data adpater. The NIC circuit includes a phase measuring block for continually generating a local phase difference indicator, where the local phase difference indicator indicates a phase relation between the local data adapter and the local synchronous master. The local phase difference indicator is transmitted to a remote data adapter. Back locally, a phase difference indicator is received from a remote data adapter. A baud clock is generated and used to transfer data from the data adapter to the synchronous master, the baud clock generator uses the phase difference indicator to recreate the phase difference between the remote data adaper and the remote synchronous master.
摘要翻译： 为了实现本发明的目的，提供了一种网络独立的时钟（NIC）电路，其允许本地同步主机与本地数据接收器交换数据。 NIC电路包括用于连续生成本地相位差指示器的相位测量块，其中本地相位差指示符指示本地数据适配器和本地同步主机之间的相位关系。 本地相位差指示器被发送到远程数据适配器。 从本地返回，从远程数据适配器接收到相位差指示符。 产生一个波特率时钟，用于将数据从数据适配器传输到同步主机，波特率时钟发生器使用相位差指示器来重建远程数据接收器和远程同步主机之间的相位差。
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公开(公告)号：US4754454A
公开(公告)日：1988-06-28
申请号：US931318
申请日：1986-11-17
CPC分类号： H04Q11/06 , H04J3/0605 , H04J3/14
摘要： This circuit facilitates the synchronization of two copies of digital control units. These digital control units control a number of digital spans. One copy of this circuit is active at any one particular time. This one copy drives all the remaining circuitry of the digital span interface for both copies of the digital control unit. The other copy of this circuit is typically in the ready-standby mode. It is not actively driving the remainder of the circuitry within its own copy. When one copy of the digital control unit is brought on-line, a framing operation must be performed to determine the proper framing bit for both copies. Circuitry in the cross-copy data path monitors an attempt to synchronize the two digital control unit copies. The data which is sent cross-copy is modified so that all data bits are at logic 1, except for a bit which the active copy believes is the proper S-bit or framing bit. In this manner, the standby copy cannot reframe on any bit, except the one which the active copy believes is the proper framing and synchronization bit.
摘要翻译： 该电路有助于数字控制单元的两个副本的同步。 这些数字控制单元控制多个数字跨度。 该电路的一个副本在任何特定的时间都是有效的。 该一个副本驱动数字量程接口的所有剩余电路，用于数字控制单元的两个副本。 该电路的另一个副本通常处于就绪待机模式。 它没有主动地驱动其自己的副本中的其余电路。 当数字控制单元的一个副本被联机时，必须执行成帧操作以确定两个副本的正确的成帧位。 交叉复制数据通道中的电路监视两个数字控制单元副本的同步尝试。 修改发送交叉副本的数据，使所有数据位均为逻辑1，除了活动副本认为是适当的S位或成帧位的位外。 以这种方式，除了活动副本认为是正确的成帧和同步位之外，备用副本不能重写任何位。
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3.发明授权
公开(公告)号：US4740961A
公开(公告)日：1988-04-26
申请号：US925044
申请日：1986-10-30
申请人： Robert E. Renner
发明人： Robert E. Renner
摘要： Telecommunication switching systems are typically connected by high-speed digital data spans. These spans may commonly be T1 or T2 carriers using DS1 or DS2 data formats, respectively. These systems may contain duplex digital span control units. Synchronization circuitry includes a time multiplexed state machine for each copy of the digital span control unit. The state machine monitors framing alarm signals from its own copy as well as from the other copy of the digital span control unit. This circuitry detects whether the framing alarm signals for each copy are identically synchronized. If these framing alarm signals are not identically synchronized, then one copy of the circuitry executes a hold (wait) operation for the other copy of the circuit to perform its reframing operation. For non-error conditions, the wait places the two copies back in synchronization. This arrangement applies stringent checking criteria to framing and synchronization bits, which have been previously found, to insure that these bits are the correct ones. As a result, the duplex units are more likely to remain synchronized.
摘要翻译： 电信交换系统通常通过高速数字数据跨接连接。 这些跨度通常分别是使用DS1或DS2数据格式的T1或T2载波。 这些系统可能包含双工数字量程控制单元。 同步电路包括用于数字量程控制单元的每个副本的时间复用状态机。 状态机监视来自其自己的副本以及数字量程控制单元的其他副本的成帧报警信号。 该电路检测每个副本的成帧报警信号是否相同同步。 如果这些成帧报警信号不是同步的，则电路的一个副本对电路的另一个副本执行保持（等待）操作，以执行其重构操作。 对于非错误条件，等待将两个副本重新同步。 这种安排对先前发现的成帧和同步位应用严格的检查标准，以确保这些位是正确的。 因此，双工单元更有可能保持同步。
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公开(公告)号：US4466094A
公开(公告)日：1984-08-14
申请号：US453267
申请日：1982-12-27
申请人： Robert E. Renner
发明人： Robert E. Renner
摘要： A time shared conference circuit for establishing conference calls in a T-S-T digital switching network provides for trapping certain PCM voice data from the output PCM voice data stream of the conference circuit. Data is automatically trapped for detection of errors such as parity. Data in any specific time slot may be trapped for a non-error condition under control of a processor.
摘要翻译： 用于在T-S-T数字交换网络中建立电话会议的时间共享会议电路提供从会议电路的输出PCM语音数据流捕获某些PCM语音数据。 数据自动被捕获以检测诸如奇偶校验之类的错误。 在处理器的控制下，任何特定时隙中的数据可能被捕获用于非错误状态。
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公开(公告)号：US4466093A
公开(公告)日：1984-08-14
申请号：US453266
申请日：1982-12-27
申请人： Robert E. Renner
发明人： Robert E. Renner
CPC分类号： H04M3/569
摘要： The conference circuit provides for establishing a conference call between three conferees in a T-S-T digital switching network. The voice samples of the three conferees are sequentially stored in input buffers. When all three conferees' samples are stored, the samples are transferred to working buffers, while the input buffers store three other conferees' samples. In the time slot succeeding the transfer to the working buffers, two conferees' voice samples are compared. During the next time slot, the resultant of the comparison is transmitted to the third conferee. This conference arrangement provides for time sharing up to 64 three-port conference calls via the switching network.
摘要翻译： 会议电路提供在T-S-T数字交换网络中的三名与会者之间建立电话会议。 三位与会者的声音样本被顺序地存储在输入缓冲器中。 当所有三位与会者的样本被存储时，样本被传送到工作缓冲区，而输入缓冲器存储三个与会者的样本。 在传输到工作缓冲区的时隙中，两个与会者的语音样本进行比较。 在下一个时隙期间，将比较结果传送给第三个会议。 该会议安排通过交换网络最多可共享64个三端口电话会议。
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公开(公告)号：US4466092A
公开(公告)日：1984-08-14
申请号：US453268
申请日：1982-12-27
申请人： Robert E. Renner
发明人： Robert E. Renner
摘要： A time shared conference circuit for establishing conference calls in a T-S-T digital switching network provides for automatically inserting predefined test data into unused time slots of its output PCM voice data stream. The transmission of this predefined data verifies the interface operation of the conference circuit with the switching network.
摘要翻译： 用于在T-S-T数字交换网络中建立电话会议的时间共享会议电路提供了将预定义的测试数据自动插入到其输出PCM语音数据流的未使用时隙中。 该预定义数据的传输验证会议电路与交换网络的接口操作。
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7.发明授权
公开(公告)号：US5214650A
公开(公告)日：1993-05-25
申请号：US615679
申请日：1990-11-19
申请人： Robert E. Renner , Kuang-Cheng Hu , Han Kem , John S. Young
发明人： Robert E. Renner , Kuang-Cheng Hu , Han Kem , John S. Young
CPC分类号： H04M11/06 , H04Q11/0428 , H04Q2213/09 , H04Q2213/174 , H04Q2213/175 , H04Q2213/292 , H04Q2213/297 , H04Q2213/405 , Y10S370/914
摘要： A data adapter for simultaneously providing a low speed channel, a first high speed data channel, and a second high speed channel over a two wire connection; the two wire connection connects the data adapter to a telephone system. The data adapter includes a line transceiver connected to the two-wire connection, the line interface provides a full duplex transmission link with the telephone system over the two-wire connection. A telephone interface converts data between the first high speed channel and a telephone instrument. A rate adapter converts data between the second high speed channel and a data processing equipment. A protocol controller performs a packet protocol on the low speed channel, and routes the first high speed channel to the telephone interface and the second high speed channel to the rate adapter. A processor that receives and transmits messages through the protocol controller over the low speed channel to the telephone system, and in response to information received over the low speed channel, alternatively information received from the rate adapter, the processor controls the data adapter.
摘要翻译： 一种数据适配器，用于同时提供低速通道，第一高速数据通道和通过双线连接的第二高速通道; 两线连接将数据适配器连接到电话系统。 数据适配器包括连接到两线连接的线路收发器，线路接口通过双线连接提供与电话系统的全双工传输链路。 电话接口在第一高速频道和电话乐器之间转换数据。 速率适配器在第二高速通道和数据处理设备之间转换数据。 协议控制器在低速信道上执行分组协议，并将第一高速信道路由到电话接口和第二高速信道到速率适配器。 一种处理器，其通过协议控制器通过低速信道接收和发送消息到电话系统，并且响应于通过低速信道接收的信息，或者从速率适配器接收到的信息，处理器控制数据适配器。
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公开(公告)号：US4757494A
公开(公告)日：1988-07-12
申请号：US116181
申请日：1987-11-02
申请人： Robert E. Renner
发明人： Robert E. Renner
摘要： A method for generating additive combinations of PCM voice samples separates the samples into magnitude portions and sign portions. The magnitude portion of each PCM voice sample is converted from compressed PCM form to linear form. The magnitudes of the two voice samples, in linear form, along with their respective signs are added together to form a resultant linear value. If there is any overflow as a result of the addition, the resultant value is truncated so as not to exceed a maximum allowable value. The resultant value is then converted from linear form to compressed PCM form along with the proper sign. These steps are iterated for each possible value of the input PCM voice samples. These resultant values are stored in a storage medium for rapid on-line use by a switching system. Off-line generation of combined PCM samples saves system real time as compared to generating these combinations on-line in real time.
摘要翻译： 用于产生PCM声音样本的加法器组合的方法将样本分离成大小部分和符号部分。 每个PCM语音样本的大小部分从压缩的PCM形式转换为线性形式。 线性形式的两个声音样本的大小以及它们各自的符号被加在一起以形成合成的线性值。 如果由于添加而导致任何溢出，则结果值被截断，以便不超过最大允许值。 然后将结果值与正确符号一起从线性形式转换为压缩PCM形式。 对于输入PCM语音样本的每个可能值，迭代这些步骤。 这些结果值存储在存储介质中，以通过交换系统快速在线使用。 组合PCM采样的离线生成与在线实时生成这些组合相比节省了系统实时性。
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公开(公告)号：US4580243A
公开(公告)日：1986-04-01
申请号：US531986
申请日：1983-09-14
申请人： Robert E. Renner , Thomas J. Perry
发明人： Robert E. Renner , Thomas J. Perry
CPC分类号： G06F13/423
摘要： The present invention provides for synchronizing signals transmitted to two duplex copies of hardware from a common source. Signals sent from the source to the duplex copies of hardware may arrive asynchronously at the two copies and require synchronization. In addition, the duplex hardware may be validly operated in the simplex mode of operation, which requires no synchronization of the two hardware copies.
摘要翻译： 本发明提供了从公共源将同步发送到硬件的两个双工拷贝的信号。 从源发送到硬件的双工副本的信号可能异步到达两个副本，并需要同步。 此外，双工硬件可以在单工操作模式下有效地操作，这不需要两个硬件副本的同步。
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公开(公告)号：US4509169A
公开(公告)日：1985-04-02
申请号：US548483
申请日：1983-11-03
申请人： Robert E. Renner
发明人： Robert E. Renner
CPC分类号： H04Q11/06
摘要： A time-space-time switching network (for local to local traffic), a time-space or a space-time switching network portion (for local to remote traffic) is shown for a small remotely located switching system. There are multiple crossovers of PCM data from one information rail to another information rail in this switching system. These two information rails provide for crossover in both the originating and terminating time switching stages for local calls and in only the originating or terminating time switching stages for calls originating or terminating at remotely located switching systems. The information rails remain segregated through the space switching stage of this switching system. The small remotely located switching system is connected to a large host digital switching system via digital spans.
摘要翻译： 时间空间交换网络（用于本地到本地流量），时间空间或时空交换网络部分（用于本地到远程流量）被示出用于小型位于远程的交换系统。 在这种交换系统中，PCM数据从一个信息轨到另一个信息轨有多个交叉。 这两个信息轨提供了用于本地呼叫的起始和终止时间切换阶段以及仅在发起或终止于远程定位的交换系统的呼叫的始发或终止时间切换阶段的交叉。 信息栏通过该交换系统的空间切换阶段保持隔离。 小型远程交换系统通过数字跨度连接到大型主机数字交换系统。
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