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公开(公告)号：US20180241412A1
公开(公告)日：2018-08-23
申请号：US15751812
申请日：2016-08-12
申请人： S9ESTRE, LLC
发明人： Bernd SCHAFFERER
摘要： Converter circuits and methods herein describe mechanisms for converting a digital input signal to an analog output signal using a series of transmission lines. The circuits and methods described herein convert to analog signal using very little power, due to inter-coupling of wave propagation media.
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公开(公告)号：US09859906B2
公开(公告)日：2018-01-02
申请号：US15501363
申请日：2015-08-11
申请人： S9ESTRE, LLC
发明人： Bernd Schafferer
摘要： Methods and devices for an energy efficient digital to analog conversion are disclosed. With the achievable sampling rates and output voltage levels, high power RF signals can be synthesized. A plurality of pulses are generated and coupled onto transmission lines. On the other end of the transmission line the pulses are either reflected or transmitted to a load line depending on the status of a termination element. In one embodiment the reflected pulses are collected and sent to a load. The energy in the transmitted pulses can be recovered and reused. In another embodiment the transmitted pulses are collected and transmitted to a load and the energy in the reflected pulses is recovered and reused.
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公开(公告)号：US09444401B1
公开(公告)日：2016-09-13
申请号：US14553065
申请日：2014-11-25
申请人： S9ESTRE, LLC
发明人： Bernd Schafferer
CPC分类号： H03B5/1852 , H03B5/1841 , H03B5/1847 , H03B9/147 , H03B2200/0024 , H03B2200/0034
摘要： Methods and devices for the generation of high frequency clock signals. In a transmission line a signal is reflected back and forward. The electric length of the transmission line determines the frequency of the oscillation. A start signal at the switching device initiates a signals traveling down the transmission line. At the other end of the transmission line the signals is reflected back. At the tapping point along the transmission line, part of the energy of the signal in the transmission line is coupled out to form the feedback signal. The feedback signal activates the switching device. The switching device injects energy into the transmission line and sustains the oscillation on the transmission line. The position of the tapping point on transmission line determines the shape of the feedback signals and can hence be used as a design parameter optimize the performance of the system. High voltage swings in the transmission lines can be used to improve the phase noise or jitter performance of the oscillator.
摘要翻译： 用于产生高频时钟信号的方法和装置。 在传输线中，信号被反射和反射。 传输线的电长度决定振荡的频率。 在开关装置处的启动信号启动沿传输线路下行的信号。 在传输线的另一端，信号被反射回来。 在沿传输线的分接点处，传输线中的信号的一部分能量被耦合到外部以形成反馈信号。 反馈信号激活开关装置。 开关装置将能量注入传输线并维持传输线上的振荡。 传输线上出线点的位置决定了反馈信号的形状，因此可以用作优化系统性能的设计参数。 传输线路中的高电压摆幅可用于提高振荡器的相位噪声或抖动性能。
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4.发明申请DIGITAL TO ANALOG CONVERTER AND ANALOG TO DIGITAL CONVERTER CALIBRATION TECHNIQUES 有权数字到模拟转换器和模拟数字转换器校准技术公开(公告)号：US20160134302A1
公开(公告)日：2016-05-12
申请号：US14941206
申请日：2015-11-13
申请人： S9ESTRE, LLC
发明人： Bernd Schafferer
CPC分类号： H03M1/066 , H03F1/3241 , H03F1/3247 , H03F3/195 , H03F3/24 , H03F2200/204 , H03F2200/207 , H03F2200/336 , H03F2201/3233 , H03M1/002 , H03M1/0658 , H03M1/1057 , H03M3/384 , H03M3/458 , H04B1/0475 , H04B2001/0425
摘要： Methods and devices for the calibration of digital to analog converters (DAC) and analog to digital converters (ADC) are disclosed. In a first step the DAC is calibrated and in a second step the calibrated DAC is used to calibrate the ADC. Averaging techniques and/or equation based techniques are used to further improve the calibration of both components in an iterative process. Embodiments of the invention allow for a very compact physical implementations of the converter. The invention reduces of analog circuitry in favor of digital circuits. Embodiments of the invention are suitable for the implementation in fine line CMOS processes and can operate in a low supply voltage environment.
摘要翻译： 公开了用于校准数模转换器（DAC）和模数转换器（ADC）的方法和装置。 在第一步中，DAC被校准，并且在第二步中，校准的DAC用于校准ADC。 使用平均技术和/或基于方程的技术来进一步改进迭代过程中两个组件的校准。 本发明的实施例允许转换器的非常紧凑的物理实现。 本发明减少了有利于数字电路的模拟电路。 本发明的实施例适用于在细线CMOS工艺中的实现，并且可以在低电源电压环境中工作。
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公开(公告)号：US20180241311A1
公开(公告)日：2018-08-23
申请号：US15751798
申请日：2016-07-01
申请人： S9ESTRE, LLC
发明人： Bernd SCHAFFERER
CPC分类号： H02M3/1584 , H02J50/00 , H02M1/088 , H02M3/158 , H02M3/285 , H02M3/335 , H02M3/33507 , H02M3/33592 , H02M2001/0048
摘要： Methods and devices for power conversion. High frequency electromagnetic waves traveling in coupled transmission lines and their reflective properties are used to perform the power conversion. The use of high frequency operation allows for physically small transmission lines. The high operating frequencies also allow for small filter capacitors at the outputs of the power converter and hence allowing for fast response times in load changes or fast signal changes in case of a gate driver. The transmission lines can be implemented on the printed circuit board, laminate or even on chip. In case of a step up converter the switching elements are not subjected to the higher output voltage levels of the power converter and can therefore be implemented in a lower voltage process technology. Further, embodiments with and without galvanic isolation are described and physical embodiments to reduce undesired electromagnetic emissions are disclosed.
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公开(公告)号：US20170230055A1
公开(公告)日：2017-08-10
申请号：US15501363
申请日：2015-08-11
申请人： S9ESTRE, LLC
发明人： Bernd SCHAFFERER
IPC分类号： H03M1/00
摘要： Methods and devices for an energy efficient digital to analog conversion are disclosed. With the achievable sampling rates and output voltage levels, high power RF signals can be synthesized. A plurality of pulses are generated and coupled onto transmission lines. On the other end of the transmission line the pulses are either reflected or transmitted to a load line depending on the status of a termination element. In one embodiment the reflected pulses are collected and sent to a load. The energy in the transmitted pulses can be recovered and reused. In another embodiment the transmitted pulses are collected and transmitted to a load and the energy in the reflected pulses is recovered and reused.
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公开(公告)号：US20210194520A1
公开(公告)日：2021-06-24
申请号：US16071352
申请日：2016-12-09
申请人： S9ESTRE, LLC
发明人： Bernd SCHAFFERER
摘要： Methods, devices and algorithms for the linearization of nonlinear time variant systems and the synchronization of a plurality of such systems. One embodiment includes a transmit path, including the power amplifier, as used in wireless transmit systems. Advances made in CMOS technology, digital to analog converter (DAC) technology make it possible to implement a substantial part of such a system in the digital domain. Additional embodiments include the integration of a substantial part of such a transmit system in a single integrated circuit (IC). A digital implementation allows for linearization of a broad range of nonlinear and time variant effects. Another aspects is the reuse of methods, devices, components and algorithms used for the linearization of a transmit system to synchronize and time align multiple transmit systems.
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公开(公告)号：US10230387B2
公开(公告)日：2019-03-12
申请号：US15751812
申请日：2016-08-12
申请人： S9ESTRE, LLC
发明人： Bernd Schafferer
摘要： Converter circuits and methods herein describe mechanisms for converting a digital input signal to an analog output signal using a series of transmission lines. The circuits and methods described herein convert to analog signal using very little power, due to inter-coupling of wave propagation media.
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9.发明授权公开(公告)号：US09344104B1
公开(公告)日：2016-05-17
申请号：US14941206
申请日：2015-11-13
申请人： S9ESTRE, LLC
发明人： Bernd Schafferer
CPC分类号： H03M1/066 , H03F1/3241 , H03F1/3247 , H03F3/195 , H03F3/24 , H03F2200/204 , H03F2200/207 , H03F2200/336 , H03F2201/3233 , H03M1/002 , H03M1/0658 , H03M1/1057 , H03M3/384 , H03M3/458 , H04B1/0475 , H04B2001/0425
摘要： Methods and devices for the calibration of digital to analog converters (DAC) and analog to digital converters (ADC) are disclosed. In a first step the DAC is calibrated and in a second step the calibrated DAC is used to calibrate the ADC. Averaging techniques and/or equation based techniques are used to further improve the calibration of both components in an iterative process. Embodiments of the invention allow for a very compact physical implementations of the converter. The invention reduces of analog circuitry in favor of digital circuits. Embodiments of the invention are suitable for the implementation in fine line CMOS processes and can operate in a low supply voltage environment.
摘要翻译： 公开了用于校准数模转换器（DAC）和模数转换器（ADC）的方法和装置。 在第一步中，DAC被校准，并且在第二步中，校准的DAC用于校准ADC。 使用平均技术和/或基于方程的技术来进一步改进迭代过程中两个组件的校准。 本发明的实施例允许转换器的非常紧凑的物理实现。 本发明减少了有利于数字电路的模拟电路。 本发明的实施例适用于在细线CMOS工艺中的实现，并且可以在低电源电压环境中工作。
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