Acceleration switch and electronic device
    1.
    发明授权
    Acceleration switch and electronic device 有权
    加速开关和电子设备

    公开(公告)号:US08791380B2

    公开(公告)日:2014-07-29

    申请号:US13582106

    申请日:2011-03-02

    IPC分类号: H01H35/02

    摘要: An acceleration switch includes a mass body having a space therein, a single arc-shaped beam supporting the mass body, a support portion supporting the arc-shaped beam, and a counter electrode disposed in the space of the mass body. The arc-shaped beam is arranged so as to surround the mass body, and the support portion is disposed at a periphery of the mass body. An electrode interval corresponding to a distance between an inner side surface of the mass body and an outer side surface of the counter electrode is 1 μm or more and 20 μm or less.

    摘要翻译: 加速开关包括其中具有空间的质量体,支撑质量体的单个弧形梁,支撑弧形梁的支撑部分和设置在质量体的空间中的对置电极。 弧形梁被布置成围绕质量体,并且支撑部设置在质量体的周边。 对应于质量体的内侧表面和对电极的外侧表面之间的距离的电极间隔为1μm以上且20μm以下。

    Switching circuit for selecting an output signal from plural input
signals
    2.
    再颁专利
    Switching circuit for selecting an output signal from plural input signals 失效
    用于从多个输入信号中选择输出信号的开关电路

    公开(公告)号:USRE36179E

    公开(公告)日:1999-04-06

    申请号:US325815

    申请日:1994-10-19

    申请人: Sadashi Shimoda

    发明人: Sadashi Shimoda

    IPC分类号: H03K5/24 H03K17/693

    摘要: A switching circuit has input terminals, switching MOS transistors, and a control circuit having a control terminal. Diodes are connected between the respective input terminals and the control circuit. When input voltage (V1, V2) are applied to the input terminals, the output terminal is selectively put in either a fixed or a floating state according to the voltage applied to the control terminal.

    摘要翻译: 开关电路具有输入端子,开关MOS晶体管和具有控制端子的控制电路。 二极管连接在各个输入端子和控制电路之间。 当将输入电压(V1,V2)施加到输入端子时,输出端子根据施加到控制端子的电压选择性地处于固定状态或浮置状态。

    Cascaded switching and series regulators
    3.
    发明授权
    Cascaded switching and series regulators 失效
    CASCADED开关和系列调节器

    公开(公告)号:US5216351A

    公开(公告)日:1993-06-01

    申请号:US698593

    申请日:1991-05-10

    申请人: Sadashi Shimoda

    发明人: Sadashi Shimoda

    摘要: The voltage regulator of the boosting/lowering type is comprised of a switching regulator block and a series regulator block, which are cascade-connected to each other. One input terminal of an error amplifier of the switching regulator block is connected to a dividing node of bleeder resistors in the series regulator block to constitute a regulative feedback loop effective to improve an efficiency of the voltage regulator.

    摘要翻译: 升压/降压型的电压调节器包括彼此级联的开关调节器块和串联调节器块。 开关调节器块的误差放大器的一个输入端子连接到串联调节器块中的泄放电阻器的分频节点,以构成有效提高电压调节器效率的调节反馈回路。

    SIGNAL PROCESSING CIRCUIT, VIBRATION DETECTION CIRCUIT, AND ELECTRONIC DEVICE
    4.
    发明申请
    SIGNAL PROCESSING CIRCUIT, VIBRATION DETECTION CIRCUIT, AND ELECTRONIC DEVICE 有权
    信号处理电路,振动检测电路和电子设备

    公开(公告)号:US20120248895A1

    公开(公告)日:2012-10-04

    申请号:US13433420

    申请日:2012-03-29

    申请人: Sadashi Shimoda

    发明人: Sadashi Shimoda

    IPC分类号: H01H35/14

    摘要: In a signal processing circuit for an acceleration switch, it has been difficult to realize a circuit in which, when a system is powered off, almost no current is consumed, and, when vibration is applied, a sensor is activated to start detecting acceleration. In a signal processing circuit, one terminal of an acceleration switch is connected to a main determination section, another terminal of the acceleration switch is connected to one of a power supply control section and a power supply, and the main determination section determines occurrence of vibration applied to the acceleration switch. Based on a result of the determination, the power supply control section controls supply of power to one of a main control section or a sensor.

    摘要翻译: 在用于加速开关的信号处理电路中,难以实现其中当系统断电时几乎不消耗电流的电路,并且当施加振动时,激活传感器以开始检测加速度。 在信号处理电路中,加速开关的一个端子连接到主判定部,加速开关的另一端子连接到电源控制部和电源之一,主判定部确定振动的发生 应用于加速开关。 基于确定的结果,电源控制部分控制向主控制部分或传感器之一供电。

    Electrical signal delay circuit
    5.
    发明授权
    Electrical signal delay circuit 失效
    电信号延时电路

    公开(公告)号:US06188266B1

    公开(公告)日:2001-02-13

    申请号:US08216807

    申请日:1994-03-23

    申请人: Sadashi Shimoda

    发明人: Sadashi Shimoda

    IPC分类号: H03K17296

    摘要: By utilizing a plurality of charge storing elements, a delay circuit may be reduced in size and cost. A delayed output signal is produced a predetermined time period after detection of an input signal by selectively charging and discharging each of a plurality of charge storage units either concurrently or successively and by detecting the charge level of each respective charge storage element. When the charge level of the respective charge storing elements indicates that a predetermined period of time has transpired since detection of the input signal, a delayed output signal is generated. This operation is performed in one embodiment by simultaneously charging two capacitors, comparing the voltage level of one capacitor with a reference potential, and inverting an output signal when the level reaches the predetermined reference potential. The second capacitor is used to tie the output to this level while the first capacitor discharges. In another embodiment, capacitors are charged and discharged in cycles and a counter is used to count the number of charge/discharge cycles. When the count reaches a predetermined number, the output signal is generated. Accordingly, a delay circuit may be produced without the need for large capacitors and resistors and may be formed in a monolithic integrated circuit.

    摘要翻译: 通过利用多个电荷存储元件,可以减小延迟电路的尺寸和成本。 通过选择性地对多个电荷存储单元中的每一个同时或相继地充电和放电并且通过检测各个电荷存储元件的充电电平,在检测到输入信号之后的预定时间周期产生延迟的输出信号。 当各个电荷存储元件的电荷电平指示从检测到输入信号起已经发生了预定的时间段时,产生延迟的输出信号。 在一个实施例中,通过同时对两个电容器充电,将一个电容器的电压电平与参考电位进行比较,以及当电平达到预定参考电位时反相输出信号,来执行该操作。 第二个电容用于在第一个电容放电时将输出与该电平相关联。 在另一个实施例中,电容器被循环地充电和放电,并且使用计数器来计数充电/放电次数。 当计数达到预定数量时,产生输出信号。 因此,可以制造延迟电路而不需要大的电容器和电阻器,并且可以在单片集成电路中形成。

    Charging and discharging control circuit and charging type power supply
device
    7.
    发明授权
    Charging and discharging control circuit and charging type power supply device 有权
    充放电控制电路和充电式电源装置

    公开(公告)号:US6081099A

    公开(公告)日:2000-06-27

    申请号:US293092

    申请日:1999-04-16

    申请人: Sadashi Shimoda

    发明人: Sadashi Shimoda

    IPC分类号: H01M10/44 H02J7/00 H01M10/46

    CPC分类号: H02J7/0031

    摘要: In a delay circuit using the charging and discharging of a capacitor for setting a delay time, there is provided means for monitoring the terminal voltage across the capacitor, and recognizing whether it is a normal voltage, or not, by using an external signal.

    摘要翻译: 在使用用于设定延迟时间的电容器的充电和放电的延迟电路中,提供了用于通过使用外部信号来监视电容器两端的端子电压并且识别其是否为正常电压的装置。