公开(公告)号：US20080025300A1

公开(公告)日：2008-01-31

申请号：US11495688

申请日：2006-07-31

Applicant: David Alston Lide ,  Praphul Chandra ,  Samant Kumar

Inventor： David Alston Lide ,  Praphul Chandra ,  Samant Kumar

IPC: H04L12/56

CPC classification number: H04L29/06027 ,  H04L65/608 ,  H04L65/80 ,  H04W28/22 ,  H04W80/04 ,  H04W84/12 ,  H04W88/02 ,  H04W88/08

Abstract: A subscriber device capable of Voice over Internet Protocol (VoIP) communication via a wireless connection with an 802.11 access point to an Internet Protocol (IP) based network includes a codec for encoding a signal into a Real Time Protocol (RTP) packet and a controller for controlling a bit-rate at which the codec encodes the signal. The codec encodes the signal at a first bit-rate during normal transmissions and encodes the signal at a second bit-rate lower than the first bit-rate upon occurrence of a predetermined triggering event.

Abstract translation: 能够通过与基于因特网协议（IP）的802.11接入点的无线连接的基于因特网协议语音（VoIP）通信的订户设备包括用于将信号编码为实时协议（RTP）分组的编解码器和控制器 用于控制编解码器对信号进行编码的比特率。 编解码器在正常传输期间以第一比特率编码信号，并且在发生预定的触发事件时以比第一比特率低的第二比特率对信号进行编码。

公开(公告)号：US07681012B2

公开(公告)日：2010-03-16

申请号：US11699562

申请日：2007-01-30

Applicant: Atul Verma ,  Samant Kumar

Inventor： Atul Verma ,  Samant Kumar

IPC: G06F13/00

CPC classification number: G06F12/10 ,  G06F2212/1032

Abstract: A method or device handles memory management faults in a device having a digital signal processor (“DSP”) and a microprocessor. The DSP includes a memory management unit (“DSP MMU”) to manage memory access by the DSP, and the DSP and the microprocessor access shared physical memory. Upon the DSP executing an instruction attempting to access a virtual address wherein the virtual address is invalid, a page fault interrupt is generated by the DSP MMU. A microprocessor interrupt handler in the microprocessor is activated in direct response to the page fault interrupt. Thereafter in the microprocessor, a translation lookaside buffer (“TLB”) entry is created in the DSP MMU, which includes a valid mapping between the virtual address and a page of physical memory. After creating the TLB entry, the microprocessor indicates to the DSP that the access by the DSP of the virtual address is completed.

Abstract translation: 方法或设备处理具有数字信号处理器（“DSP”）和微处理器的设备中的存储器管理故障。 DSP包括一个内存管理单元（“DSP MMU”），用于管理DSP的存储器访问，DSP和微处理器访问共享的物理内存。 在DSP执行试图访问虚拟地址无效的虚拟地址的指令时，由DSP MMU产生寻呼故障中断。 微处理器中的微处理器中断处理程序是直接响应页错误中断而被激活的。 此后在微处理器中，在DSP MMU中创建翻译后备缓冲器（“TLB”）条目，其包括虚拟地址和物理存储器页之间的有效映射。 在创建TLB条目之后，微处理器向DSP指示DSP访问虚拟地址。

公开(公告)号：US20080183931A1

公开(公告)日：2008-07-31

申请号：US11699562

申请日：2007-01-30

Applicant: Atul Verm ,  Samant Kumar

Inventor： Atul Verm ,  Samant Kumar

IPC: G06F12/10 ,  G06F11/07 ,  G06F13/24

CPC classification number: G06F12/10 ,  G06F2212/1032

Abstract: A method or device handles memory management faults in a device having a digital signal processor (“DSP”) and a microprocessor. The DSP includes a memory management unit (“DSP MMU”) to manage memory access by the DSP, and the DSP and the microprocessor access shared physical memory. Upon the DSP executing an instruction attempting to access a virtual address wherein the virtual address is invalid, a page fault interrupt is generated by the DSP MMU. A microprocessor interrupt handler in the microprocessor is activated in direct response to the page fault interrupt. Thereafter in the microprocessor, a translation lookaside buffer (“TLB”) entry is created in the DSP MMU, which includes a valid mapping between the virtual address and a page of physical memory. After creating the TLB entry, the microprocessor indicates to the DSP that the access by the DSP of the virtual address is completed.

Abstract translation: 方法或设备处理具有数字信号处理器（“DSP”）和微处理器的设备中的存储器管理故障。 DSP包括一个内存管理单元（“DSP MMU”），用于管理DSP的存储器访问，DSP和微处理器访问共享的物理内存。 在DSP执行试图访问虚拟地址无效的虚拟地址的指令时，由DSP MMU产生寻呼故障中断。 微处理器中的微处理器中断处理程序是直接响应页错误中断而被激活的。 此后在微处理器中，在DSP MMU中创建翻译后备缓冲器（“TLB”）条目，其包括虚拟地址和物理存储器页之间的有效映射。 在创建TLB条目之后，微处理器向DSP指示DSP访问虚拟地址。

公开(公告)号：US20050117183A1

公开(公告)日：2005-06-02

申请号：US10722438

申请日：2003-11-28

Applicant: Sachin Adlakha ,  Frank Fruth ,  Samant Kumar

Inventor： Sachin Adlakha ,  Frank Fruth ,  Samant Kumar

IPC: H04N1/32 ,  H04L12/66 ,  H04L29/06 ,  H04L29/08 ,  H04M1/00 ,  H04M1/253 ,  H04M7/00 ,  H04M11/00 ,  H04N1/00 ,  H04N1/327

CPC classification number: H04L67/06 ,  H04L29/06 ,  H04L29/06027 ,  H04L67/02 ,  H04L69/329 ,  H04M1/2535 ,  H04M2201/52 ,  H04M2207/203 ,  H04N1/00209 ,  H04N1/0022 ,  H04N1/32704 ,  H04N1/32708 ,  H04N1/32719 ,  H04N1/32721 ,  H04N1/32741

Abstract: A fax-aware telephone for handling facsimile transmissions over a computer network, such as the Internet, that includes a facsimile processing unit for handling an incoming or outgoing facsimile call, a voice processing unit for handling an incoming or outgoing voice call, a memory unit for storing an incoming facsimile transmission, and a file transfer protocol client for transferring a facsimile transmission to the computer network, an external storage device, or to a printer driver. The fax-aware telephone handles a facsimile call and a voice call together over a single data line from a computer network.

Abstract translation: 一种用于处理诸如因特网的计算机网络上的传真传输的传真感知电话，其包括用于处理传入或传出传真呼叫的传真处理单元，用于处理传入或传出语音呼叫的语音处理单元，存储单元 用于存储传入传真传输，以及用于将传真传输传送到计算机网络的文件传输协议客户端，外部存储设备或打印机驱动程序。 传真感应电话通过来自计算机网络的单个数据线一起处理传真呼叫和语音呼叫。

公开(公告)号：US20070121604A1

公开(公告)日：2007-05-31

申请号：US11552785

申请日：2006-10-25

Applicant: Praphul Chandra ,  David Lide ,  Manoj Sindhwani ,  Satish Mundra ,  Samant Kumar ,  Keith Krasnansky ,  Thomas McKinney

Inventor： Praphul Chandra ,  David Lide ,  Manoj Sindhwani ,  Satish Mundra ,  Samant Kumar ,  Keith Krasnansky ,  Thomas McKinney

IPC: H04L12/66

CPC classification number: H04L29/06027 ,  H04L65/1053 ,  H04L65/1059 ,  H04L65/1069 ,  H04L67/2861 ,  H04M1/2535

Abstract: Disclosed above are various embodiments of VoIP communication systems that utilize low cost IP phones that rely on a centralized VoIP controller for much of the processing. Reducing the processing taking place on an IP phone may reduce the number of components that need to be on the IP phone which may result in a less expensive IP phone in terms of both cost and power. When the IP phone is embodied as a WIPP, the reduced processing may also result in more efficient communication between the WIPP and an AP. The increased communication efficiency may result in less power being used by the WIPP and effectively extend the battery life. Since a number of redundant components have been centralized, the VoIP system as a whole may be less costly. Also, centralized control may provide greater functionality and versatility in the setup and configuration of a VoIP communication system.

Abstract translation: 上面公开的是使用低成本IP电话的VoIP通信系统的各种实施例，其依赖于集中式VoIP控制器来进行大部分处理。 降低在IP电话上进行的处理可能减少需要在IP电话上的组件的数量，这可能导致成本和功耗方面较便宜的IP电话。 当IP电话被实现为WIPP时，缩减的处理也可以导致WIPP和AP之间的更有效的通信。 提高的通信效率可能导致WIPP使用的功率较少，并有效延长了电池寿命。 由于许多冗余组件已经集中，因此整个VoIP系统可能成本较低。 此外，集中控制可以在VoIP通信系统的设置和配置中提供更大的功能和多功能性。