公开(公告)号：US08841704B2

公开(公告)日：2014-09-23

申请号：US13406123

申请日：2012-02-27

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/66

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/7787

摘要： Disclosed herein is a nitride based semiconductor device, including: a substrate; a nitride based semiconductor layer having a lower nitride based semiconductor layer and an upper nitride based semiconductor layer on the substrate; an isolation area including an interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer; and drain electrodes, source electrode, and gate electrodes formed on the upper nitride based semiconductor layer. According to preferred embodiments of the present invention, in the nitride based semiconductor device, by using the isolation area including the interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer, problems of parasitic capacitance and leakage current are solved, and as a result, a switching speed can be improved through a gate pad.

摘要翻译： 本文公开了一种氮化物基半导体器件，包括：衬底; 在衬底上具有下氮化物基半导体层和上部氮化物基半导体层的氮化物基半导体层; 隔离区域，包括下部氮化物基半导体层和上部氮化物基半导体层之间的界面; 以及形成在上部氮化物基半导体层上的漏电极，源电极和栅电极。 根据本发明的优选实施例，在基于氮化物的半导体器件中，通过使用包括下部氮化物基半导体层和上部氮化物类半导体层之间的界面的隔离区域，解决寄生电容和漏电流的问题， 结果，可以通过栅极焊盘改善切换速度。

公开(公告)号：US08716754B2

公开(公告)日：2014-05-06

申请号：US13429148

申请日：2012-03-23

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L31/072

CPC分类号： H01L29/42316 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device One aspect of the present invention provides a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a p-type nitride layer formed on the nitride semiconductor layer between the source and drain electrodes; an n-type nitride layer formed on the p-type nitride layer; and a gate electrode formed between the source and drain electrodes to be close to the source electrode and in contact with the n-type nitride layer so that a source-side sidewall thereof is aligned with source-side sidewalls of the p-type and n-type nitride layers.

摘要翻译： 本发明涉及氮化物半导体器件本发明的一个方面提供一种氮化物半导体器件，其包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 形成在所述源极和漏极之间的所述氮化物半导体层上的p型氮化物层; 形成在p型氮化物层上的n型氮化物层; 以及形成在源电极和漏电极之间的栅电极，以接近源电极并与n型氮化物层接触，使得源侧侧壁与p型和n型源极侧的侧壁对准 型氮化物层。

公开(公告)号：US20130146888A1

公开(公告)日：2013-06-13

申请号：US13402692

申请日：2012-02-22

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/10

CPC分类号： H01L27/088 ,  H01L21/8258 ,  H01L27/0605 ,  H01L29/267 ,  H01L29/778 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed herein is a monolithic semiconductor device including: a substrate; a high electron mobility transistor (HEMT) structure that is a first device structure formed on the substrate; and a laterally diffused metal oxide field effect transistor (LDMOSFET) structure that is a second device structure formed to be connected with the HEMT structure on the substrate.The monolithic semiconductor device according to preferred embodiments of the present invention is a device having characteristics of a normally-off device while maintaining high current characteristics in a normally-on state, thereby improving high current and high voltage operation characteristics.

摘要翻译： 本文公开了一种单片半导体器件，包括：衬底; 作为形成在基板上的第一器件结构的高电子迁移率晶体管（HEMT）结构; 以及横向扩散的金属氧化物场效应晶体管（LDMOSFET）结构，其是形成为与衬底上的HEMT结构连接的第二器件结构。根据本发明的优选实施例的单片半导体器件是具有 常闭设备，同时在常开状态下保持高电流特性，从而改善高电流和高电压操作特性。

公开(公告)号：US20140027160A1

公开(公告)日：2014-01-30

申请号：US13619254

申请日：2012-09-14

申请人： Seok Yoon HONG ,  Kyung In Kang

发明人： Seok Yoon HONG ,  Kyung In Kang

IPC分类号： H05K1/09 ,  B05D5/12 ,  H05K1/02

CPC分类号： H05K1/111 ,  H05K3/3436 ,  H05K2201/0391 ,  H05K2201/0989 ,  Y02P70/611

摘要： There is provided a printed circuit board including: a core substrate; a solder mask selectively covering one surface of the core substrate; an open region of the solder mask including a portion of a surface of the core substrate and partitioned by the solder mask; a ball land formed on the open region of the solder mask; and a barrier formed between the ball land and the solder mask.

摘要翻译： 提供一种印刷电路板，包括：芯基板; 选择性地覆盖芯基板的一个表面的焊料掩模; 所述焊接掩模的开放区域包括所述芯基板的表面的一部分并且被所述焊接掩模分隔; 形成在焊料掩模的开放区域上的球形区域; 以及形成在焊盘和焊盘之间的屏障。

公开(公告)号：US20130146983A1

公开(公告)日：2013-06-13

申请号：US13406123

申请日：2012-02-27

申请人： Young Hwan PARK ,  Woo Chul JEON ,  Ki Yeol PARK ,  Seok Yoon HONG

发明人： Young Hwan PARK ,  Woo Chul JEON ,  Ki Yeol PARK ,  Seok Yoon HONG

IPC分类号： H01L27/088 ,  H01L21/336

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/7787

摘要： Disclosed herein is a nitride based semiconductor device, including: a substrate; a nitride based semiconductor layer having a lower nitride based semiconductor layer and an upper nitride based semiconductor layer on the substrate; an isolation area including an interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer; and drain electrodes, source electrode, and gate electrodes formed on the upper nitride based semiconductor layer.According to preferred embodiments of the present invention, in the nitride based semiconductor device, by using the isolation area including the interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer, problems of parasitic capacitance and leakage current are solved, and as a result, a switching speed can be improved through a gate pad.

摘要翻译： 本文公开了一种氮化物基半导体器件，包括：衬底; 在衬底上具有下氮化物基半导体层和上部氮化物基半导体层的氮化物基半导体层; 隔离区域，包括下部氮化物基半导体层和上部氮化物基半导体层之间的界面; 以及形成在上部氮化物基半导体层上的漏电极，源电极和栅电极。 根据本发明的优选实施例，在基于氮化物的半导体器件中，通过使用包括下部氮化物基半导体层和上部氮化物类半导体层之间的界面的隔离区域，解决寄生电容和漏电流的问题， 结果，可以通过栅极焊盘改善切换速度。

公开(公告)号：US20130082277A1

公开(公告)日：2013-04-04

申请号：US13442494

申请日：2012-04-09

申请人： Young Hwan PARK ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan PARK ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/20 ,  H01L21/335

CPC分类号： H01L29/41725 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a plurality of p-type nitride semiconductor segments formed on the nitride semiconductor layer and each formed lengthways from a first sidewall thereof, which is spaced apart from the source electrode, to a drain side; and a gate electrode formed to be close to the source electrode and in contact with the nitride semiconductor layer between the plurality of p-type semiconductor segments and portions of the p-type semiconductor segments extending in the direction of a source-side sidewall of the gate electrode aligned with the first sidewalls of the p-type nitride semiconductor segments is provided.

摘要翻译： 本发明涉及一种氮化物半导体器件及其制造方法。 根据本发明的一个方面，一种氮化物半导体器件包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 多个p型氮化物半导体段形成在氮化物半导体层上，并且每个从源极电极间隔开的第一侧壁纵向形成到漏极侧; 以及栅电极，其形成为靠近所述源电极并且与所述多个p型半导体区段之间的所述氮化物半导体层和所述p型半导体区段沿所述源极侧侧壁的方向延伸的部分接触 提供了与p型氮化物半导体段的第一侧壁对准的栅电极。

公开(公告)号：US20130082276A1

公开(公告)日：2013-04-04

申请号：US13429148

申请日：2012-03-23

申请人： Young Hwan PARK ,  Woo Chul JEON ,  Ki Yeol PARK ,  Seok Yoon HONG

发明人： Young Hwan PARK ,  Woo Chul JEON ,  Ki Yeol PARK ,  Seok Yoon HONG

IPC分类号： H01L29/778 ,  H01L21/335

CPC分类号： H01L29/42316 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a p-type nitride layer formed on the nitride semiconductor layer between the source and drain electrodes; an n-type nitride layer formed on the p-type nitride layer; and a gate electrode formed between the source and drain electrodes to be close to the source electrode and in contact with the n-type nitride layer so that a source-side sidewall thereof is aligned with source-side sidewalls of the p-type and n-type nitride layers is provided. Further, a method of manufacturing a nitride semiconductor device is provided.

摘要翻译： 本发明涉及一种氮化物半导体器件及其制造方法。 根据本发明的一个方面，一种氮化物半导体器件包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 形成在所述源极和漏极之间的所述氮化物半导体层上的p型氮化物层; 形成在p型氮化物层上的n型氮化物层; 以及形成在源电极和漏电极之间的栅电极，以接近源电极并与n型氮化物层接触，使得源侧侧壁与p型和n型源极侧的侧壁对准 型氮化物层。 此外，提供了一种制造氮化物半导体器件的方法。

公开(公告)号：US08860087B2

公开(公告)日：2014-10-14

申请号：US13442494

申请日：2012-04-09

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L29/20

CPC分类号： H01L29/41725 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a plurality of p-type nitride semiconductor segments formed on the nitride semiconductor layer and each formed lengthways from a first sidewall thereof, which is spaced apart from the source electrode, to a drain side; and a gate electrode formed to be close to the source electrode and in contact with the nitride semiconductor layer between the plurality of p-type semiconductor segments and portions of the p-type semiconductor segments extending in the direction of a source-side sidewall of the gate electrode aligned with the first sidewalls of the p-type nitride semiconductor segments is provided.

摘要翻译： 本发明涉及一种氮化物半导体器件及其制造方法。 根据本发明的一个方面，一种氮化物半导体器件包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 多个p型氮化物半导体段形成在氮化物半导体层上，并且每个从源极电极间隔开的第一侧壁纵向形成到漏极侧; 以及栅电极，其形成为靠近所述源电极并且与所述多个p型半导体区段之间的所述氮化物半导体层和所述p型半导体区段的沿所述源极侧侧壁的方向延伸的部分接触 提供了与p型氮化物半导体段的第一侧壁对准的栅电极。