公开(公告)号：US08841704B2

公开(公告)日：2014-09-23

申请号：US13406123

申请日：2012-02-27

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/66

CPC分类号： H01L29/66462 ,  H01L29/2003 ,  H01L29/7787

摘要： Disclosed herein is a nitride based semiconductor device, including: a substrate; a nitride based semiconductor layer having a lower nitride based semiconductor layer and an upper nitride based semiconductor layer on the substrate; an isolation area including an interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer; and drain electrodes, source electrode, and gate electrodes formed on the upper nitride based semiconductor layer. According to preferred embodiments of the present invention, in the nitride based semiconductor device, by using the isolation area including the interface between the lower nitride based semiconductor layer and the upper nitride based semiconductor layer, problems of parasitic capacitance and leakage current are solved, and as a result, a switching speed can be improved through a gate pad.

摘要翻译： 本文公开了一种氮化物基半导体器件，包括：衬底; 在衬底上具有下氮化物基半导体层和上部氮化物基半导体层的氮化物基半导体层; 隔离区域，包括下部氮化物基半导体层和上部氮化物基半导体层之间的界面; 以及形成在上部氮化物基半导体层上的漏电极，源电极和栅电极。 根据本发明的优选实施例，在基于氮化物的半导体器件中，通过使用包括下部氮化物基半导体层和上部氮化物类半导体层之间的界面的隔离区域，解决寄生电容和漏电流的问题， 结果，可以通过栅极焊盘改善切换速度。

公开(公告)号：US08716754B2

公开(公告)日：2014-05-06

申请号：US13429148

申请日：2012-03-23

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L31/072

CPC分类号： H01L29/42316 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device One aspect of the present invention provides a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a p-type nitride layer formed on the nitride semiconductor layer between the source and drain electrodes; an n-type nitride layer formed on the p-type nitride layer; and a gate electrode formed between the source and drain electrodes to be close to the source electrode and in contact with the n-type nitride layer so that a source-side sidewall thereof is aligned with source-side sidewalls of the p-type and n-type nitride layers.

摘要翻译： 本发明涉及氮化物半导体器件本发明的一个方面提供一种氮化物半导体器件，其包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 形成在所述源极和漏极之间的所述氮化物半导体层上的p型氮化物层; 形成在p型氮化物层上的n型氮化物层; 以及形成在源电极和漏电极之间的栅电极，以接近源电极并与n型氮化物层接触，使得源侧侧壁与p型和n型源极侧的侧壁对准 型氮化物层。

公开(公告)号：US20130146888A1

公开(公告)日：2013-06-13

申请号：US13402692

申请日：2012-02-22

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/10

CPC分类号： H01L27/088 ,  H01L21/8258 ,  H01L27/0605 ,  H01L29/267 ,  H01L29/778 ,  H01L29/7835 ,  H01L2924/0002 ,  H01L2924/00

摘要： Disclosed herein is a monolithic semiconductor device including: a substrate; a high electron mobility transistor (HEMT) structure that is a first device structure formed on the substrate; and a laterally diffused metal oxide field effect transistor (LDMOSFET) structure that is a second device structure formed to be connected with the HEMT structure on the substrate.The monolithic semiconductor device according to preferred embodiments of the present invention is a device having characteristics of a normally-off device while maintaining high current characteristics in a normally-on state, thereby improving high current and high voltage operation characteristics.

摘要翻译： 本文公开了一种单片半导体器件，包括：衬底; 作为形成在基板上的第一器件结构的高电子迁移率晶体管（HEMT）结构; 以及横向扩散的金属氧化物场效应晶体管（LDMOSFET）结构，其是形成为与衬底上的HEMT结构连接的第二器件结构。根据本发明的优选实施例的单片半导体器件是具有 常闭设备，同时在常开状态下保持高电流特性，从而改善高电流和高电压操作特性。

公开(公告)号：US08860087B2

公开(公告)日：2014-10-14

申请号：US13442494

申请日：2012-04-09

申请人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

发明人： Young Hwan Park ,  Woo Chul Jeon ,  Ki Yeol Park ,  Seok Yoon Hong

IPC分类号： H01L29/66 ,  H01L29/778 ,  H01L29/417 ,  H01L29/423 ,  H01L29/20

CPC分类号： H01L29/41725 ,  H01L29/2003 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： The present invention relates to a nitride semiconductor device and a manufacturing method thereof. According to one aspect of the present invention, a nitride semiconductor device including: a nitride semiconductor layer having a 2DEG channel; a source electrode in ohmic contact with the nitride semiconductor layer; a drain electrode in ohmic contact with the nitride semiconductor layer; a plurality of p-type nitride semiconductor segments formed on the nitride semiconductor layer and each formed lengthways from a first sidewall thereof, which is spaced apart from the source electrode, to a drain side; and a gate electrode formed to be close to the source electrode and in contact with the nitride semiconductor layer between the plurality of p-type semiconductor segments and portions of the p-type semiconductor segments extending in the direction of a source-side sidewall of the gate electrode aligned with the first sidewalls of the p-type nitride semiconductor segments is provided.

摘要翻译： 本发明涉及一种氮化物半导体器件及其制造方法。 根据本发明的一个方面，一种氮化物半导体器件包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的源电极; 与氮化物半导体层欧姆接触的漏电极; 多个p型氮化物半导体段形成在氮化物半导体层上，并且每个从源极电极间隔开的第一侧壁纵向形成到漏极侧; 以及栅电极，其形成为靠近所述源电极并且与所述多个p型半导体区段之间的所述氮化物半导体层和所述p型半导体区段的沿所述源极侧侧壁的方向延伸的部分接触 提供了与p型氮化物半导体段的第一侧壁对准的栅电极。

公开(公告)号：US08373245B2

公开(公告)日：2013-02-12

申请号：US12654940

申请日：2010-01-08

申请人： Woo Chul Jeon ,  Jung Hee Lee ,  Young Hwan Park ,  Ki Yeol Park

发明人： Woo Chul Jeon ,  Jung Hee Lee ,  Young Hwan Park ,  Ki Yeol Park

IPC分类号： H01L29/47

CPC分类号： H01L29/66007 ,  H01L21/02521 ,  H01L29/0692 ,  H01L29/2003 ,  H01L29/66143 ,  H01L29/872

摘要： Disclosed is a semiconductor device including: a base substrate; a semiconductor layer disposed on the base substrate; an ohmic electrode part which has ohmic electrode lines disposed in a first direction, on the semiconductor layer; and a Schottky electrode part which is disposed to be spaced apart from the ohmic electrode lines on the semiconductor layer and includes Schottky electrode lines disposed in the first direction, wherein the Schottky electrode lines and the ohmic electrode lines are alternately disposed in parallel, and the ohmic electrode part further includes first ohmic electrodes covered by the Schottky electrode lines on the semiconductor layer.

摘要翻译： 公开了一种半导体器件，包括：基底; 设置在所述基底基板上的半导体层; 在所述半导体层上具有沿第一方向设置的欧姆电极线的欧姆电极部; 以及肖特基电极部，其设置为与半导体层上的欧姆电极线间隔开，并且包括沿第一方向设置的肖特基电极线，其中肖特基电极线和欧姆电极线交替地平行设置，并且 欧姆电极部分还包括由半导体层上的肖特基电极线覆盖的第一欧姆电极。

公开(公告)号：US08373200B2

公开(公告)日：2013-02-12

申请号：US12842303

申请日：2010-07-23

申请人： Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park ,  Jung Hee Lee

发明人： Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park ,  Jung Hee Lee

IPC分类号： H01L29/739

CPC分类号： H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

摘要： Disclosed herein is a nitride based semiconductor device. The nitride based semiconductor device includes: a base substrate; an epitaxial growth layer disposed on the base substrate and having a defect generated due to lattice disparity with the base substrate; a leakage current barrier covering the epitaxial growth layer while filling the defect; and an electrode part disposed on the epitaxial growth layer.

摘要翻译： 本文公开了一种氮化物基半导体器件。 氮化物基半导体器件包括：基底; 外延生长层，其设置在所述基底基板上，并且由于与所述基底基板的晶格差异而产生缺陷; 在填充缺陷的同时覆盖外延生长层的漏电流屏障; 以及设置在外延生长层上的电极部分。

公开(公告)号：US20120267686A1

公开(公告)日：2012-10-25

申请号：US13137291

申请日：2011-08-03

申请人： Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park

发明人： Woo Chul Jeon ,  Ki Yeol Park ,  Young Hwan Park

IPC分类号： H01L29/778 ,  H01L21/338

CPC分类号： H01L29/66431 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/42316 ,  H01L29/66462 ,  H01L29/7787

摘要： Provided is a nitride semiconductor device including: a nitride semiconductor layer over a substrate wherein the nitride semiconductor has a two-dimensional electron gas (2DEG) channel inside; a drain electrode in ohmic contact with the nitride semiconductor layer; a source electrode spaced apart from the drain electrode, in Schottky contact with the nitride semiconductor layer, and having an ohmic pattern in ohmic contact with the nitride semiconductor layer inside; a dielectric layer formed on the nitride semiconductor layer between the drain electrode and the source electrode and on at least a portion of the source electrode; and a gate electrode disposed on the dielectric layer to be spaced apart from the drain electrode, wherein a portion of the gate electrode is formed over a drain-side edge portion of the source electrode with the dielectric layer interposed therebetween, and a manufacturing method thereof.

摘要翻译： 提供一种氮化物半导体器件，其包括：氮化物半导体层，其在氮化物半导体内部具有二维电子气体（2DEG）通道的衬底上; 与氮化物半导体层欧姆接触的漏电极; 源极与漏极间隔开，与氮化物半导体层肖特基接触，并且具有与内部的氮化物半导体层欧姆接触的欧姆图案; 形成在所述氮化物半导体层上的所述漏电极和所述源电极之间以及所述源电极的至少一部分上的电介质层; 以及设置在所述电介质层上以与所述漏极间隔开的栅电极，其中所述栅电极的一部分形成在所述源电极的漏极侧边缘部分之间，并且介电层插入其间;以及其制造方法 。

公开(公告)号：US20120267639A1

公开(公告)日：2012-10-25

申请号：US13448678

申请日：2012-04-17

申请人： Woo Chul JEON ,  Ki Yeol Park ,  Young Hwan Park

发明人： Woo Chul JEON ,  Ki Yeol Park ,  Young Hwan Park

IPC分类号： H01L29/778 ,  H01L21/336 ,  H01L29/205

CPC分类号： H01L29/402 ,  H01L29/0607 ,  H01L29/2003 ,  H01L29/42376 ,  H01L29/66462 ,  H01L29/7787

摘要： Disclosed herein are a nitride semiconductor device and a method for manufacturing the same. According to an exemplary embodiment, there is provided a nitride semiconductor device, including: a nitride semiconductor layer having a 2DEG channel; a drain electrode ohmic-contacted with the nitride semiconductor layer; a source electrode Schottky-contacted with the nitride semiconductor layer, including a plurality of patterned protrusion portions protruded to the drain electrode direction, and including an ohmic pattern ohmic-contacted with the nitride semiconductor layer therein; a dielectric layer disposed on the nitride semiconductor layer between the drain electrode and the source electrode and over at least a portion of the source electrode including the patterned protrusion portions; and a gate electrode disposed on the dielectric, wherein a portion of the gate electrode is disposed on the dielectric layer over the patterned protrusion portions and a drain direction edge portion of the source electrode.

摘要翻译： 本文公开了一种氮化物半导体器件及其制造方法。 根据示例性实施例，提供了一种氮化物半导体器件，包括：具有2DEG通道的氮化物半导体层; 与氮化物半导体层欧姆接触的漏电极; 与氮化物半导体层肖特基接触的源电极，包括突出到漏电极方向的多个图案化突起部分，并且包括与其中的氮化物半导体层欧姆接触的欧姆图案; 设置在所述氮化物半导体层之间的介电层，位于所述漏电极和所述源电极之间，以及至少部分所述源极包括所述图案化突起部分; 以及设置在所述电介质上的栅电极，其中所述栅电极的一部分设置在所述图案化的突出部分上的所述电介质层和所述源电极的漏极方向边缘部分上。

公开(公告)号：US20110233623A1

公开(公告)日：2011-09-29

申请号：US12965649

申请日：2010-12-10

申请人： Ki Yeol PARK ,  Woo Chul Jeon ,  Young Hwan Park ,  Jung Hee Lee

发明人： Ki Yeol PARK ,  Woo Chul Jeon ,  Young Hwan Park ,  Jung Hee Lee

IPC分类号： H01L29/778 ,  H01L21/336

CPC分类号： H01L29/7786 ,  H01L29/0649 ,  H01L29/2003 ,  H01L29/365 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/78681

摘要： There is provided a semiconductor device and a method of manufacturing the same. The semiconductor device includes a base substrate; a semiconductor layer having a receiving groove, a protrusion part, a first carrier injection layer, at least two insulating patterns, and a second carrier injection layer provided on the base substrate, the insulating patterns being disposed to traverse the first carrier injection layer and the second carrier injection layer being spaced apart from the first carrier injection layer and disposed on a lower portion of the protrusion part; a source electrode and a drain electrode disposed to be spaced apart from each other on the semiconductor layer; and a gate electrode insulated from the source electrode and the drain electrode and having a recess part recessed into the receiving groove, wherein a lowest portion of the receiving groove contacts an uppermost layer of the first carrier injection layer or is disposed above the uppermost layer thereof, and an insulating pattern, disposed at an innermost portion of the semiconductor layer among the insulating patterns, traverses the first carrier injection layer and is disposed at the outside of both sides of the receiving groove in a thickness direction thereof.

摘要翻译： 提供了一种半导体器件及其制造方法。 半导体器件包括：基底; 具有接收槽的半导体层，突起部分，第一载流子注入层，至少两个绝缘图案和设置在基底基板上的第二载流子注入层，绝缘图案设置成穿过第一载流子注入层和 第二载体注入层与第一载体注入层间隔开并设置在突出部分的下部; 源电极和漏电极，设置成在半导体层上彼此间隔开; 以及与源电极和漏电极绝缘的栅电极，并且具有凹入到所述接收槽中的凹部，其中所述接收槽的最下部接触所述第一载流子注入层的最上层，或者设置在所述第一载流子注入层的最上层 并且绝缘图案设置在绝缘图案中的半导体层的最内部，穿过第一载流子注入层，并且沿着其厚度方向设置在容纳槽的两侧的外侧。

公开(公告)号：US20110233613A1

公开(公告)日：2011-09-29

申请号：US12965640

申请日：2010-12-10

申请人： Woo Chul JEON ,  Ki Yeol Park ,  Young Hwan Park ,  Jung Hee Lee

发明人： Woo Chul JEON ,  Ki Yeol Park ,  Young Hwan Park ,  Jung Hee Lee

IPC分类号： H01L29/778 ,  H01L21/335

CPC分类号： H01L29/7786 ,  H01L29/2003 ,  H01L29/66462

摘要： There are provided a semiconductor device and a method for manufacturing the same. The semiconductor device according to the present invention includes a base substrate; a semiconductor layer that includes a receiving groove and a protrusion part formed on the base substrate, a first carrier injection layer and at least two insulating layers formed to traverse the first carrier injection layer formed in the semiconductor layer, and a second carrier injection layer spaced apart from the first carrier injection layer formed on the protrusion part; a source electrode and a drain electrode that are disposed to be spaced apart from each other on the semiconductor layer; and a gate electrode that is insulated from the source electrode and the drain electrode and has a recess part recessed into the receiving groove, wherein the lowest end portion of the receiving groove contacts the uppermost layer of the first carrier injection layer and the insulating pattern disposed at the innermost side of the semiconductor layer among the insulating patterns traverses the entire layer forming the first carrier injection layer and is disposed at the outer side of both side end portions in the thickness direction of the receiving groove.

摘要翻译： 提供了一种半导体器件及其制造方法。 根据本发明的半导体器件包括：基底; 半导体层，其包括形成在所述基底基板上的接收槽和突出部，第一载流子注入层和形成为穿过形成在所述半导体层中的所述第一载流子注入层形成的至少两个绝缘层，以及间隔开的第二载流子注入层 除了形成在突出部上的第一载流子注入层之外; 源电极和漏电极，其设置成在半导体层上彼此间隔开; 以及与源电极和漏电极绝缘并且具有凹入到接收槽中的凹部的栅电极，其中接收槽的最低端部接触第一载流子注入层的最上层，并且布置的绝缘图案 在绝缘图案中的半导体层的最内侧穿过形成第一载流子注入层的整个层，并且设置在接收槽的厚度方向上的两个侧端部的外侧。