公开(公告)号：US20050194095A1

公开(公告)日：2005-09-08

申请号：US10790185

申请日：2004-03-02

申请人： Tatehito Usui ,  Motohiko Yoshigai ,  Kazuhiro Joo ,  Shigeru Nakamoto

发明人： Tatehito Usui ,  Motohiko Yoshigai ,  Kazuhiro Joo ,  Shigeru Nakamoto

IPC分类号： C23F1/00

CPC分类号： H01J37/32972 ,  H01L21/32137

摘要： A semiconductor production apparatus for etching a semiconductor wafer arranged in a container and having a film on the surface thereof, by a plasma generated in the container is disclosed. The temporal change of the amount of light is detected for at least two wavelengths obtained from the wafer surface for a predetermined period of the processing time. The etching condition is determined by comparing a predetermined time with the time length between a time point at which the temporal change amount of the light of one of the two wavelengths assumes a maximum value and a time point at which the amount of light of the other wavelength assumes a minimum value.

摘要翻译： 公开了一种半导体制造装置，用于通过容器中产生的等离子体来蚀刻布置在容器中并且在其表面上具有膜的半导体晶片。 在处理时间的预定时间段内，从晶片表面获得的至少两个波长检测光量的时间变化。 通过将预定时间与两个波长中的一个的光的时间变化量取为最大值的时间点与另一个的一个的光的时间点之间的时间长度进行比较来确定蚀刻条件 波长假定为最小值。

公开(公告)号：US06920369B2

公开(公告)日：2005-07-19

申请号：US10911659

申请日：2004-08-05

申请人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

发明人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

IPC分类号： G05B23/02 ,  B01J3/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/677 ,  G06F19/00

CPC分类号： H01L21/67276 ,  H01L21/67167 ,  H01L21/67745 ,  H01L21/67769

摘要： A method of operating vacuum processing equipment that includes multiple sets of apparatus for performing a succession of different processes on individual wafers, an apparatus for transporting said wafers, and an apparatus for controlling said processing apparatus sets and said transport apparatus, and has at least two sets of wafer processing routes including multiple sets of said processing apparatus; wherein it is possible to judge whether each set of said processing apparatus for performing various processes is in a valid or invalid status for operation, to electrically disconnect only the processing apparatus whose operational status has been judged to be invalid, to reconstruct said processing routes by using the processing apparatus whose operational status has been judged to be valid, and to process said wafers by using only said processing apparatus which is valid for operation.

摘要翻译： 一种操作真空处理设备的方法，其包括用于在单个晶片上执行不同处理的多组设备，用于传输所述晶片的设备以及用于控制所述处理设备组和所述传送设备的设备，并且具有至少两个 一组晶片处理路线，包括多组所述处理装置; 其中可以判断用于执行各种处理的所述处理装置的每一组是否处于用于操作的有效或无效状态，仅电连接仅操作状态被判断为无效的处理装置，以便重新构建所述处理路线 使用其操作状态已被判断为有效的处理装置，并且仅使用对于操作有效的所述处理装置来处理所述晶片。

公开(公告)号：US20050010320A1

公开(公告)日：2005-01-13

申请号：US10911659

申请日：2004-08-05

申请人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

发明人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

IPC分类号： G05B23/02 ,  B01J3/00 ,  H01L21/00 ,  H01L21/02 ,  H01L21/677 ,  G06F19/00

CPC分类号： H01L21/67276 ,  H01L21/67167 ,  H01L21/67745 ,  H01L21/67769

摘要： A method of operating vacuum processing equipment that includes multiple sets of apparatus for performing a succession of different processes on individual wafers, an apparatus for transporting said wafers, and an apparatus for controlling said processing apparatus sets and said transport apparatus, and has at least two sets of wafer processing routes including multiple sets of said processing apparatus; wherein it is possible to judge whether each set of said processing apparatus for performing various processes is in a valid or invalid status for operation, to electrically disconnect only the processing apparatus whose operational status has been judged to be invalid, to reconstruct said processing routes by using the processing apparatus whose operational status has been judged to be valid, and to process said wafers by using only said processing apparatus which is valid for operation.

公开(公告)号：US06795745B1

公开(公告)日：2004-09-21

申请号：US09666596

申请日：2000-09-20

申请人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

发明人： Tooru Ueno ,  Shigeru Nakamoto ,  Shoji Okiguchi ,  Hideki Yamasaki ,  Kouji Nishihata

IPC分类号： G06F1900

CPC分类号： H01L21/67276 ,  H01L21/67167 ,  H01L21/67745 ,  H01L21/67769

摘要： A method of operating vacuum processing equipment that includes multiple sets of apparatus for performing a succession of different processes on individual wafers, an apparatus for transporting said wafers, and an apparatus for controlling said processing apparatus sets and said transport apparatus, and has at least two sets of wafer processing routes including multiple sets of said processing apparatus; wherein it is possible to judge whether each set of said processing apparatus for performing various processes is in a valid or invalid status for operation, to electrically disconnect only the processing apparatus whose operational status has been judged to be invalid, to reconstruct said processing routes by using the processing apparatus whose operational status has been judged to be valid, and to process said wafers by using only said processing apparatus which is valid for operation.

摘要翻译： 一种操作真空处理设备的方法，其包括用于在单个晶片上执行不同处理的多组设备，用于传输所述晶片的设备以及用于控制所述处理设备组和所述传送设备的设备，并且具有至少两个 一组晶片处理路线，包括多组所述处理装置; 其中可以判断用于执行各种处理的所述处理装置的每一组是否处于用于操作的有效或无效状态，仅电连接仅操作状态被判断为无效的处理装置，以便重新构建所述处理路线 使用其操作状态已被判断为有效的处理装置，并且仅使用对于操作有效的所述处理装置来处理所述晶片。

公开(公告)号：US07047093B2

公开(公告)日：2006-05-16

申请号：US10689594

申请日：2003-10-22

申请人： Shigeru Nakamoto ,  Hideaki Kondo ,  Juntaro Arima

发明人： Shigeru Nakamoto ,  Hideaki Kondo ,  Juntaro Arima

IPC分类号： G06F19/00

CPC分类号： G05B23/0272 ,  G05B17/02 ,  G05B2219/33284 ,  G05B2219/33324 ,  G05B2219/45031 ,  H01L21/67276 ,  Y02P90/86 ,  Y10T29/41

摘要： A sample processing apparatus having a main unit for processing a sample, a recorder for recording information of an operation in the main unit as predetermined data, which information includes a plurality of data corresponding to outputs of a plurality of sensors installed on the main unit, and a display unit for displaying each of the data corresponding to outputs of the sensors simultaneously.

摘要翻译： 具有用于处理样本的主单元的样本处理设备，用于将主单元中的操作的信息记录为预定数据的记录器，该信息包括对应于安装在主单元上的多个传感器的输出的多个数据， 以及显示单元，用于同时显示与传感器的输出相对应的每个数据。

公开(公告)号：US06596551B1

公开(公告)日：2003-07-22

申请号：US09452174

申请日：1999-12-01

申请人： Tatehito Usui ,  Ken Yoshioka ,  Shoji Ikuhara ,  Kouji Nishihata ,  Kazue Takahashi ,  Tetsunori Kaji ,  Shigeru Nakamoto

发明人： Tatehito Usui ,  Ken Yoshioka ,  Shoji Ikuhara ,  Kouji Nishihata ,  Kazue Takahashi ,  Tetsunori Kaji ,  Shigeru Nakamoto

IPC分类号： H01L2166

CPC分类号： H01L21/76805 ,  H01L21/76807 ,  H01L21/76808 ,  H01L21/7681 ,  H01L21/76897 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： Etching end point judging method that includes the following steps in a dry etching end point judging method having a step of reducing noise of input signal waveforms using first digital filter, a step of obtaining a differential coefficient (primary or secondary) of a signal waveform from differential processing by operation circuit, a step of obtaining a smoothed differential coefficient value by reducing the noise components of the time series differential coefficient waveform that was obtained in the previous step, using the second digital filter, and a step of judging an etching end point by comparing the smoothed differential coefficient value and a preset value using discrimination method.

摘要翻译： 一种蚀刻终点判定方法，其特征在于，在具有使用第一数字滤波器降低输入信号波形的噪声的步骤的干式蚀刻终点判定方法中，具有以下步骤：获得信号波形的微分系数（初级或次级） 通过运算电路的差分处理，通过使用第二数字滤波器减少上一步骤中获得的时间序列差分系数波形的噪声分量来获得平滑的微分系数值的步骤，以及判断蚀刻终点 通过使用判别方法比较平滑的微分系数值和预设值。

公开(公告)号：US20120018094A1

公开(公告)日：2012-01-26

申请号：US12856725

申请日：2010-08-16

申请人： Daisuke SHIRAISHI ,  Akira Kagoshima ,  Satomi Inoue ,  Shigeru Nakamoto

发明人： Daisuke SHIRAISHI ,  Akira Kagoshima ,  Satomi Inoue ,  Shigeru Nakamoto

IPC分类号： H01L21/66 ,  H01L21/465

CPC分类号： H01L21/31116 ,  H01J37/32192 ,  H01J37/32972 ,  H01L21/31122

摘要： A plasma processing apparatus for applying an etching processing to a wafer by using at least two steps of the etching processing which operate with plasma formed within a pressure-reduced processing chamber, the wafer being located within the processing chamber inside a vacuum vessel, and having a mask on a silicon-composed substrate and a film structure, the film structure including processing-target films located under the mask, wherein the plasma processing apparatus is equipped with a function for processing another different wafer in such a manner that a processing condition at a precedent-stage step of the two steps of the etching processing in the processing of the different wafer is adjusted based on a result obtained by detecting a time which has elapsed until termination of a subsequent-stage step of the two steps of the etching processing.

摘要翻译： 一种等离子体处理装置，其通过使用在减压处理室内形成的等离子体进行蚀刻处理的至少两个步骤对晶片施加蚀刻处理，所述晶片位于真空容器内的处理室内，并且具有 硅构成基板上的掩模和膜结构，所述膜结构包括位于掩模下方的处理目标膜，其中所述等离子体处理装置具有用于处理另一不同晶片的功能， 基于通过检测经过的时间直到蚀刻处理的两个步骤的后续步骤的结束为止，调整在不同晶片的处理中的蚀刻处理的两个步骤的前两级步骤 。

公开(公告)号：US20070178610A1

公开(公告)日：2007-08-02

申请号：US11696878

申请日：2007-04-05

申请人： Tatehito Usui ,  Motohiko Yoshigai ,  Kazuhiro Joo ,  Shigeru Nakamoto

发明人： Tatehito Usui ,  Motohiko Yoshigai ,  Kazuhiro Joo ,  Shigeru Nakamoto

IPC分类号： H01L21/00 ,  H01L21/306 ,  C23F1/00 ,  H01L21/302

CPC分类号： H01J37/32972 ,  H01L21/32137

摘要： A semiconductor production apparatus and method for etching a semiconductor wafer arranged in a container and having a film on the surface thereof, by use of a plasma generated in the container. A temporal change of a quantity of an interference light is detected for at least two wavelengths obtained from the surface of the wafer for a predetermined time period of an etching process of the wafer, an etching quantity of the wafer is determined, which varies as long as the etching process proceeds, based upon a particular change arising in the interference light of plural pairs of wavelengths, the plural pairs of the wavelengths corresponding to the etching quantities, respectively.

摘要翻译： 一种用于通过使用在容器中产生的等离子体来蚀刻布置在容器中并在其表面上具有膜的半导体晶片的半导体制造装置和方法。 在晶片的蚀刻处理的预定时间段内，从晶片表面获得的至少两个波长检测干涉光量的时间变化，确定晶片的蚀刻量，其长度变化 随着蚀刻工艺的进行，基于在多对波长的干涉光中产生的特定变化，分别对应于蚀刻量的多对波长。

公开(公告)号：US08992721B2

公开(公告)日：2015-03-31

申请号：US12696571

申请日：2010-01-29

申请人： Akira Kagoshima ,  Daisuke Shiraishi ,  Satomi Inoue ,  Shigeru Nakamoto ,  Shoji Ikuhara ,  Toshihiro Morisawa

发明人： Akira Kagoshima ,  Daisuke Shiraishi ,  Satomi Inoue ,  Shigeru Nakamoto ,  Shoji Ikuhara ,  Toshihiro Morisawa

IPC分类号： G05B13/04 ,  H01J37/32

CPC分类号： H01J37/32926 ,  G05B13/048 ,  G05B2219/31357 ,  H01J37/32935

摘要： A plasma processing apparatus including: a monitor device which monitors a process quantity generated at plasma processing; a monitor value estimation unit which has monitor quantity variation models for storing change of a monitor value of the process quantity in accordance with the number of processed specimens and which estimates a monitor value for a process of a next specimen by referring to the monitor quantity variation models; and a control quantity calculation unit which stores a relation between a control quantity for controlling the process quantity of the vacuum processing device and a monitor value and which calculates the control quantity based on a deviation of the estimated monitor value from a target value to thereby control the process quantity for the process of the next specimen. Thus, a process model indicating variation of the state of a process processing apparatus can be added to a control loop in such run-to-run control that process conditions are changed according to each wafer process, so that stable processed results can be obtained even when variation occurs in processes.

摘要翻译： 一种等离子体处理装置，包括：监视器，其监视在等离子体处理时产生的处理量; 监视值估计单元，其具有监视量变化模型，用于根据处理样本的数量存储处理量的监视值的变化，并且通过参考监视量变化估计下一个样本的处理的监视值 楷模; 以及控制量计算单元，其存储用于控制真空处理装置的处理量的控制量与监视值之间的关系，并且基于估计监视值与目标值的偏差来计算控制量，从而控制 下一个试样的加工量。 因此，表示处理处理装置的状态的变化的处理模型可以在这样的运行控制中被添加到控制回路中，即，根据每个晶片处理改变处理条件，从而甚至可以获得稳定的处理结果 当过程发生变化时。

公开(公告)号：US08784677B2

公开(公告)日：2014-07-22

申请号：US12856725

申请日：2010-08-16

申请人： Daisuke Shiraishi ,  Akira Kagoshima ,  Satomi Inoue ,  Shigeru Nakamoto

发明人： Daisuke Shiraishi ,  Akira Kagoshima ,  Satomi Inoue ,  Shigeru Nakamoto

IPC分类号： H01L21/66 ,  H01L21/465

CPC分类号： H01L21/31116 ,  H01J37/32192 ,  H01J37/32972 ,  H01L21/31122

摘要： A plasma processing apparatus for applying an etching processing to a wafer by using at least two steps of the etching processing which operate with plasma formed within a pressure-reduced processing chamber, the wafer being located within the processing chamber inside a vacuum vessel, and having a mask on a silicon-composed substrate and a film structure, the film structure including processing-target films located under the mask, wherein the plasma processing apparatus is equipped with a function for processing another different wafer in such a manner that a processing condition at a precedent-stage step of the two steps of the etching processing in the processing of the different wafer is adjusted based on a result obtained by detecting a time which has elapsed until termination of a subsequent-stage step of the two steps of the etching processing.

摘要翻译： 一种等离子体处理装置，其通过使用在减压处理室内形成的等离子体进行蚀刻处理的至少两个步骤对晶片施加蚀刻处理，所述晶片位于真空容器内的处理室内，并且具有 硅构成基板上的掩模和膜结构，所述膜结构包括位于掩模下方的处理目标膜，其中所述等离子体处理装置具有用于处理另一不同晶片的功能， 基于通过检测经过的时间直到蚀刻处理的两个步骤的后续步骤的结束为止，调整在不同晶片的处理中的蚀刻处理的两个步骤的前两级步骤 。