Stackable Package Having Embedded Interposer and Method for Making the Same
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    发明申请
    Stackable Package Having Embedded Interposer and Method for Making the Same 审中-公开
    具有嵌入式内插器的可堆叠封装及其制作方法

    公开(公告)号:US20100289133A1

    公开(公告)日:2010-11-18

    申请号:US12727770

    申请日:2010-03-19

    摘要: The present invention relates to a stackable package having an embedded interposer and a method for making the same. The package includes a substrate, a chip, a first embedded interposer, a circuit layer and a solder mask. The substrate has an upper surface, a bottom surface and at least one connecting pad. The connecting pad is disposed adjacent to the upper surface. The chip is disposed adjacent to the upper surface of the substrate, and is electrically connected to the substrate. The first embedded interposer encapsulates the upper surface of the substrate and the chip. The to first embedded interposer includes at least one plating through hole. The plating through hole penetrates through the first embedded interposer, and is connected to the connecting pad of the substrate. The circuit layer is disposed adjacent to the first embedded interposer, and the plating through hole is connected to the circuit layer. The circuit layer includes at least one pad. The solder mask is disposed adjacent to the circuit layer, and exposes the pad. Therefore, the package has more pads for inputting/outputting, more flexibility for stacking a top package, and a reduced total thickness.

    摘要翻译: 本发明涉及具有嵌入式插入器的可堆叠封装及其制造方法。 封装包括衬底,芯片,第一嵌入式插入器,电路层和焊接掩模。 基板具有上表面,底表面和至少一个连接垫。 连接垫邻近上表面设置。 芯片靠近基板的上表面设置,并与基板电连接。 第一嵌入式插入器封装衬底和芯片的上表面。 第一嵌入式插入器包括至少一个电镀通孔。 电镀通孔穿过第一嵌入式插入器,并连接到衬底的连接焊盘。 电路层与第一嵌入式插入件相邻设置,电镀通孔与电路层连接。 电路层包括至少一个焊盘。 焊接掩模邻近电路层设置,并露出焊盘。 因此,封装具有更多的用于输入/输出的焊盘,用于堆叠顶部封装的更大的灵活性和更小的总厚度。